摘要:
A clock recovery circuit includes a clock detector configured to receive a serial data stream from a remote device over a reverse channel, wherein the serial data stream includes clock reference data, reverse channel data, or a combination of the clock reference data and the reverse channel data, and the clock detector configured to output a clock detect signal in response to detecting the clock reference data in the serial data stream; a phase lock loop including a first detector configured to receive the serial data stream and to detect phase and frequency; and a controller configured to receive the clock detect signal and to selectively enable the first detector based on the clock detect signal.
摘要:
A clock recovery circuit includes a clock detector configured to receive a serial data stream from a remote device over a reverse channel, wherein the serial data stream includes clock reference data, reverse channel data, or a combination of the clock reference data and the reverse channel data, and the clock detector configured to output a clock detect signal in response to detecting the clock reference data in the serial data stream; a phase lock loop including a first detector configured to receive the serial data stream and to detect phase and frequency; and a controller configured to receive the clock detect signal and to selectively enable the first detector based on the clock detect signal.
摘要:
A capacitive sensing system are configured to sense a capacitance value and convert the sensed capacitance value to a digital format. The capacitive sensing system provides good selectivity and immunity to noise and interference, which can be further enhanced by enabling spread spectrum excitation. In some embodiments, the capacitive sensing system utilizes a sinusoidal excitation signal that results in low electromagnetic emissions, limited to narrow frequency band. In some embodiments, the capacitive sensing system is configured to operate in a spread spectrum mode, in which the majority of the excitation signal power is carried in the assigned bandwidth. The excitation frequency and the bandwidth of the spread spectrum excitation signal are programmable in a wide range, which allows for avoiding frequency conflicts in the operating environment.
摘要:
A clock recovery circuit includes a clock detector configured to receive a serial data stream from a remote device over a reverse channel, wherein the serial data stream includes clock reference data, reverse channel data, or a combination of the clock reference data and the reverse channel data, and the clock detector configured to output a clock detect signal in response to detecting the clock reference data in the serial data stream; a phase lock loop including a first detector configured to receive the serial data stream and to detect phase and frequency; and a controller configured to receive the clock detect signal and to selectively enable the first detector based on the clock detect signal.
摘要:
A capacitive sensing system are configured to sense a capacitance value and convert the sensed capacitance value to a digital format. The capacitive sensing system provides good selectivity and immunity to noise and interference, which can be further enhanced by enabling spread spectrum excitation. In some embodiments, the capacitive sensing system utilizes a sinusoidal excitation signal that results in low electromagnetic emissions, limited to narrow frequency band. In some embodiments, the capacitive sensing system is configured to operate in a spread spectrum mode, in which the majority of the excitation signal power is carried in the assigned bandwidth. The excitation frequency and the bandwidth of the spread spectrum excitation signal are programmable in a wide range, which allows for avoiding frequency conflicts in the operating environment.