Surface laminar circuit board having pad disposed within a through hole
    1.
    发明授权
    Surface laminar circuit board having pad disposed within a through hole 失效
    具有布置在通孔内的垫的表面层状电路板

    公开(公告)号:US06734369B1

    公开(公告)日:2004-05-11

    申请号:US09651334

    申请日:2000-08-31

    IPC分类号: H05K103

    摘要: A surface laminar circuit board includes an insulating layer, and a signal ground conductive layer disposed on an upper surface of the insulating layer. The conductive layer has a hole formed therein. A photosensitive dielectric layer is disposed on an upper surface of the signal ground conductive layer. The dielectric layer has a photo micro-via formed therein. A signal trace is disposed on the photosensitive dielectric layer, and is electrically coupled with the signal ground conductive layer by way of the photo micro-via. A conductive pad is provided, which has a majority thereof within an area defined by an outer periphery of the hole. The conductive pad is electrically coupled with the signal trace. A surface mounted component is mounted on the conductive pad.

    摘要翻译: 表面层状电路基板包括绝缘层和设置在绝缘层的上表面上的信号接地导电层。 导电层具有形成在其中的孔。 光敏介电层设置在信号接地导电层的上表面上。 电介质层具有形成在其中的光微通孔。 信号迹线设置在光敏电介质层上,并通过照相微通孔与信号接地导电层电耦合。 提供了一种导电垫,其具有大部分在由孔的外周限定的区域内。 导电焊盘与信号迹线电耦合。 表面安装部件安装在导电焊盘上。

    Method of making surface laminar circuit board
    2.
    发明授权
    Method of making surface laminar circuit board 失效
    制作表面层状电路板的方法

    公开(公告)号:US06594893B2

    公开(公告)日:2003-07-22

    申请号:US09953934

    申请日:2001-09-18

    IPC分类号: H05K310

    摘要: A surface laminar circuit board includes an insulating layer, and a signal ground conductive layer disposed on an upper surface of the insulating layer. The conductive layer has a hole formed therein. A photosensitive dielectric layer is disposed on an upper surface of the signal ground conductive layer. The dielectric layer has a photo micro-via formed therein. A signal trace is disposed on the photosensitive dielectric layer, and is electrically coupled with the signal ground conductive layer by way of the photo micro-via. A conductive pad is provided, which has a majority thereof within an area defined by an outer periphery of the hole. The conductive pad is electrically coupled with the signal trace. A surface mounted component is mounted on the conductive pad.

    摘要翻译: 表面层状电路基板包括绝缘层和设置在绝缘层的上表面上的信号接地导电层。 导电层具有形成在其中的孔。 光敏介电层设置在信号接地导电层的上表面上。 电介质层具有形成在其中的光微通孔。 信号迹线设置在光敏电介质层上,并通过照相微通孔与信号接地导电层电耦合。 提供了一种导电垫,其具有大部分在由孔的外周限定的区域内。 导电焊盘与信号迹线电耦合。 表面安装部件安装在导电焊盘上。

    Fully balanced transimpedance amplifier for high speed and low voltage applications
    3.
    发明授权
    Fully balanced transimpedance amplifier for high speed and low voltage applications 失效
    用于高速和低电压应用的全平衡跨阻放大器

    公开(公告)号:US06433638B1

    公开(公告)日:2002-08-13

    申请号:US09655816

    申请日:2000-09-06

    IPC分类号: H03F345

    摘要: A fully balanced transimpedance amplifier for high speed and low voltage applications is provided. An input stage of the amplifier uses a matched pair of common source connected transistors with sources tied directly to ground to eliminate the Vds overhead usually found in differential pairs. The ground connection minimizes a source resistance noise component, while matching minimizes power supply noise generation and susceptibility for an array of amplifiers. Feedback resistors along with diode connected MESFETS determine the transimpedance of the amplifier. The nonlinearity of diodes helps to soften clipping. Transresistance also determined the noise generated by the amplifier, and the diode connected MESFETS offer lower noise than resistors for the same impedance. Stability is achieved through use of only a single stage of gain in a loop of the input stage, while additional gain is achieved through cascading in the input stage. A differential stage minimizes any difference in amplitude between two sides of the amplifier input stage. Two stages of source followers provide buffering to drive a relatively low impedance load at the output of the amplifier. Single integrated capacitor coupling, for high bandwidth, low noise, low voltage operation with an integrated detector is provided.

    摘要翻译: 提供了用于高速和低电压应用的完全平衡的跨阻抗放大器。 放大器的输入级使用一对公共源极连接的晶体管,源极直接与地相连,以消除通常在差分对中发现的Vds开销。 接地连接最小化源电阻噪声分量,同时匹配可最大限度地减少放大器阵列的电源噪声产生和敏感性。 反馈电阻和二极管连接的MESFETS决定了放大器的跨导阻抗。 二极管的非线性有助于软化削波。 Transresistance还确定了放大器产生的噪声,并且连接的二极管MESFETS的阻抗比同一阻抗的电阻低。 通过在输入级的环路中仅使用单级增益实现稳定性,而在输入级中通过级联实现附加增益。 差分级使放大器输入级两侧之间的幅度差异最小化。 源级跟随器的两级提供缓冲以在放大器的输出处驱动相对较低的阻抗负载。 提供单集成电容耦合,用于高带宽,低噪声,低电压操作与集成检测器。