HYBRID IMAGE SENSORS WITH MULTIMODE SHUTTERS

    公开(公告)号:US20240406600A1

    公开(公告)日:2024-12-05

    申请号:US18328344

    申请日:2023-06-02

    Abstract: One example hybrid image sensor with multimode shutters includes a plurality of pixel arrays, each array of pixels comprising a plurality of pixels, each pixel comprising a light-sensing element configured to generate and store a charge in response to incoming light; each pixel array comprising: a charge storage device configured to receive charge from each of the light-sensing elements of the pixel array; a first plurality of switches, each switch of the first plurality of switches connected between a respective pixel of the pixel array and the charge storage device; a second plurality of switches, the second plurality of switches comprising a high-resolution selection switch and a low-resolution selection switch, each of the high-resolution selection switch and the low-resolution selection switch connected in parallel to an output of the charge storage device; a plurality of pixel output lines, each pixel output line configured to output signals representative of pixel values corresponding to one or more pixel arrays coupled to the respective pixel output line.

    DIGITAL PIXEL SENSOR
    4.
    发明申请

    公开(公告)号:US20230092325A1

    公开(公告)日:2023-03-23

    申请号:US17931001

    申请日:2022-09-09

    Abstract: In one example, an apparatus comprises a first photodiode, a second photodiode, a first floating diffusion, a second floating diffusion, a quantizer, and a controller. The controller can enable the first photodiode and the second photodiode to generate and accumulate photo charge within an exposure period, and use the quantizer to quantize reset voltages at the first floating diffusion and at the second floating diffusion to generate a first digital reset value and a second digital reset value. After the exposure period ends, the controller can transfer the photo charge from the first photodiode and the second photodiode to, respectively, the first floating diffusion and the second floating diffusion to generate a first signal voltage and a second signal voltage, and quantize the signal voltages into digital signal values using the quantizer. Digital representations can be generated based on the digital reset values and the digital signal values.

    Noise-reduction circuit for an image sensor

    公开(公告)号:US12170854B2

    公开(公告)日:2024-12-17

    申请号:US17950199

    申请日:2022-09-22

    Abstract: Some examples described herein include a noise-reduction circuit for an image sensor. The noise-reduction circuit can include a reference frame generator configured to generate a reference frame based on a set of image frames received from an image sensor during a calibration phase. The noise-reduction circuit can also include a memory coupled to the reference frame generator. The memory can receive the reference frame from the reference frame generator and store the reference frame for subsequent use during a noise-reduction phase. The noise-reduction circuit can further include a processor coupled to the memory. The processor can retrieve the reference frame from the memory and use the reference frame to reduce noise in an image frame received from the image sensor during the noise-reduction phase.

    Pixel sensor having multiple photodiodes and shared comparator

    公开(公告)号:US11956413B2

    公开(公告)日:2024-04-09

    申请号:US16550851

    申请日:2019-08-26

    CPC classification number: H04N13/286 H04N5/3559 H04N5/378

    Abstract: In one example, an apparatus comprises: a first photodiode to generate a first charge; a second photodiode to generate a second charge; a quantizer; a first memory bank and a second memory bank; and a controller configured to: control the quantizer to perform a first quantization operation and a second quantization operation of the first charge to generate, respectively, a first digital output and a second digital output, the first and second quantization operations being associated with different intensity ranges; store one of the first digital output or the second digital output in the first memory bank; control the quantizer to perform a third quantization operation of the second charge to generate a third digital output, the third quantization operation being associated with a different intensity range from at least one of the first or second quantization operations; and store the third digital output in the second memory bank.

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