公开(公告)号：US20190196233A1

公开(公告)日：2019-06-27

申请号：US16228823

申请日：2018-12-21

Applicant: Leica Microsystems CMS GmbH

Inventor： Patric MRAWEK ,  Thorsten KOESTER

IPC: G02F1/11

CPC classification number: G02F1/113 ,  G02B21/0024 ,  G02F1/11 ,  H03C1/60

Abstract: A method for generating a control signal, having at least one frequency component, for an acousto-optical element, from one frequency spectrum having the at least one frequency, or from multiple frequency spectra which together have the at least one frequency, includes the step of obtaining, from the one frequency spectrum or from the multiple frequency spectra, one transmit signal in the time domain in each case via an inverse Fourier transform. The one or the multiple transmit signals are modulated via a single-sideband modulation onto a carrier signal having a carrier frequency in order to obtain one modulated signal in each case. The control signal is obtained as a real part of the one modulated signal or as a consolidation of the real parts of the multiple modulated signals.

公开(公告)号：US20190196162A1

公开(公告)日：2019-06-27

申请号：US16226668

申请日：2018-12-20

Applicant: Leica Microsystems CMS GmbH

Inventor： Patric MRAWEK ,  Thorsten KOESTER

IPC: G02B21/00 ,  G02F1/11 ,  G02F1/33 ,  G01J3/12

CPC classification number: G02B21/008 ,  G01J3/1256 ,  G02B21/0032 ,  G02B21/0072 ,  G02F1/11 ,  G02F1/33

Abstract: A method for generating a control signal for an acousto-optical element includes generating a raw signal using at least one correction term by an IQ modulation from a target I component and a target Q component, and amplifying the raw signal to become the control signal. The target I component and/or the target Q component are corrected using the at least one correction term. The at least one correction term is obtained from an analysis of the control signal.

公开(公告)号：US20130311816A1

公开(公告)日：2013-11-21

申请号：US13894455

申请日：2013-05-15

Applicant: LEICA MICROSYSTEMS CMS GMBH

Inventor： Thorsten KOESTER

IPC: G06F1/08

CPC classification number: G06F1/08 ,  H03K5/13

Abstract: A circuit for delaying an input signal includes first and second delay units. The input signal is switched to the first delay unit which is configured to delay the input signal by k cycles of a first clock signal so as to generate a value xt—k and transfer the input signal to the second delay unit. The second delay unit includes a converter and a second shift register. The converter is connected to the second shift register by n leads. The value xt—k and a value xt—k−1 are present at the converter, where xt—k−1 is the input signal delayed by k−1 cycles of the first clock signal, The converter is configured such that the value xt—k−1 is present on leads 1 to m and the value xt—k is present on leads m+1 to n. The second shift register is configured to successively output values present on leads 1 to n.

Abstract translation: 用于延迟输入信号的电路包括第一和第二延迟单元。 输入信号被切换到第一延迟单元，其被配置为将输入信号延迟第一时钟信号的k个周期，以便生成值xt-k并将输入信号传送到第二延迟单元。 第二延迟单元包括转换器和第二移位寄存器。 转换器通过n个引线连接到第二个移位寄存器。 值xt-k和值xt-k-1存在于转换器处，其中xt-k-1是延迟第一时钟信号的k-1个周期的输入信号。转换器被配置为使得值xt -k-1存在于引线1至m上，并且值xt-k存在于引线m + 1至n上。 第二移位寄存器被配置为连续输出引线1至n上存在的值。

公开(公告)号：US20130307958A1

公开(公告)日：2013-11-21

申请号：US13894503

申请日：2013-05-15

Applicant: LEICA MICROSYSTEMS CMS GMBH

Inventor： Thorsten KOESTER

IPC: G02B21/36

CPC classification number: G02B21/365 ,  G02B21/008 ,  H01J37/224 ,  H01J37/28

Abstract: A circuit for controlling a microscope using a controller includes a slow memory configured to store control information. The controller is configured to control microscope parameters based on the control information. The circuit includes a data loader and at least two fast memories. The data loader is configured such that control information is written from the slow memory alternately into one of the at least two fast memories. The circuit also includes a multiplexer configured to permit access by the controller to one of the at least two fast memories in alternating fashion so as to read control information. The data loader is configured to control the multiplexer in such a way that a write operation by the data loader and a read operation by the controller will not occur simultaneously on the same fast memory.

Abstract translation: 用于使用控制器控制显微镜的电路包括被配置为存储控制信息的慢速存储器。 控制器被配置为基于控制信息来控制显微镜参数。 该电路包括数据加载器和至少两个快速存储器。 配置数据加载器使得控制信息被从慢速存储器交替写入至少两个快速存储器之一。 电路还包括被配置为允许控制器以交替方式访问至少两个快速存储器之一以便读取控制信息的多路复用器。 数据加载器被配置为以这样的方式控制多路复用器，使得数据加载器的写操作和控制器的读操作不会在同一快速存储器上同时发生。

公开(公告)号：US20130307603A1

公开(公告)日：2013-11-21

申请号：US13895424

申请日：2013-05-16

Applicant: LEICA MICROSYSTEMS CMS GMBH

Inventor： Thorsten KOESTER

IPC: H03K5/15

CPC classification number: H03K5/15 ,  G02B21/16 ,  H03K5/131 ,  H03K5/15013

Abstract: A circuit is configured to generate periodic control signals including at least two mutually phase-shifted control signals. The circuit includes a plurality of generator circuits, where a separate generator circuit is provided for each control signal output by the circuit. Each generator circuit includes a phase value memory configured to store a phase value, where the phase value defines a phase shift. Each generator circuit includes an activation input and, in response to application of an activation level to the activation input, is configured to initiate a generation of a control signal which is phase-shifted by an amount defined by the phase value. The activation inputs of the generator circuits are connected together to an activation circuit for outputting an activation level to the generator circuits simultaneously.

Abstract translation: 电路被配置为产生包括至少两个相互相移的控制信号的周期性控制信号。 电路包括多个发生器电路，其中为由电路输出的每个控制信号提供单独的发生器电路。 每个发生器电路包括配置为存储相位值的相位值存储器，其中相位值定义相移。 每个发生器电路包括激活输入，并且响应于向激活输入施加激活电平，被配置为启动由相位值定义的量相移的控制信号的产生。 发电机电路的激活输入端连接在激活电路上，用于同时向发电机电路输出激活电平。