公开(公告)号：US11881149B2

公开(公告)日：2024-01-23

申请号：US17755375

申请日：2019-11-01

Applicant: LG ELECTRONICS INC.

Inventor： Hyunchul Noh ,  Kyejong Yim

IPC: G09G3/20 ,  G09G3/3233

CPC classification number: G09G3/2096 ,  G09G3/3233 ,  G09G2300/0842 ,  G09G2330/021 ,  G09G2340/04 ,  G09G2360/18

Abstract: The signal processing device according to an embodiment of the present disclosure includes: a frame buffer to store an input image and output an output image, an output synchronization signal calculator to calculate an output synchronization signal based on an input synchronization signal and a size or a position of the output image in comparison with the input image, and an output synchronization signal output interface to output a variable output synchronization signal of which a start timing changes based on a signal from the output synchronization signal calculator, wherein a difference between a start timing of the input synchronization signal and a start timing of the output synchronization signal changes based on the size of the output image. Accordingly, a delay time may be reduced in response to the output image having a size different from a size of the input image being output.