公开(公告)号：US20160035749A1

公开(公告)日：2016-02-04

申请号：US14584918

申请日：2014-12-29

申请人： LG Display Co., Ltd.

发明人： In Kang ,  Tae-Yong Jung ,  Tae-Keun Lee

IPC分类号： H01L27/12 ,  H01L29/66 ,  H01L29/786

CPC分类号： H01L27/124 ,  G02F1/13454 ,  G09G3/3677 ,  G09G2300/0408 ,  H01L27/1248 ,  H01L27/1259 ,  H01L29/66765 ,  H01L29/78669

摘要： An array substrate includes: a substrate; a gate connecting line on the substrate in a gate circuit area; a gate insulating layer on the gate connecting line; an active pattern on the gate insulating layer; a source connecting line and a pixel pattern sequentially disposed on the active pattern; an interlayer insulating layer and an organic pattern sequentially disposed on the gate insulating layer; a first passivation layer on the organic pattern; and a conductive pattern on the first passivation layer, the conductive pattern coupled to the gate connecting line and to the pixel pattern.

摘要翻译： 阵列基板包括：基板; 栅极电路区域中的衬底上的栅极连接线; 栅极连接线上的栅极绝缘层; 栅极绝缘层上的有源图案; 源连接线和顺序设置在有源图案上的像素图案; 顺序地设置在所述栅绝缘层上的层间绝缘层和有机图案; 有机图案上的第一钝化层; 以及在所述第一钝化层上的导电图案，所述导电图案耦合到所述栅极连接线和所述像素图案。

公开(公告)号：US09837007B2

公开(公告)日：2017-12-05

申请号：US14982876

申请日：2015-12-29

申请人： LG DISPLAY CO., LTD.

发明人： In Kang ,  TaeKeun Lee

IPC分类号： G09G3/00 ,  G06F3/041 ,  G09G3/36 ,  G02F1/1333 ,  G02F1/13 ,  G02F1/1362 ,  G02F1/1345

CPC分类号： G09G3/006 ,  G02F1/1309 ,  G02F1/13338 ,  G02F1/136286 ,  G02F2001/13456 ,  G02F2001/136254 ,  G02F2201/121 ,  G06F3/0412 ,  G09G3/3648

摘要： Disclosed is an in-cell touch liquid crystal display (LCD) apparatus comprising: an active area in which a plurality of pixels are provided; and a pad area in which an auto probe test pattern is disposed, wherein the auto probe test pattern comprises a common voltage enable signal line; a common voltage switching unit; a data enable signal line through which a data enable signal is applied; and a data switching unit that is coupled to the data enable signal line and configured to be turned on by the data enable signal and output a data voltage. The common voltage enable signal line and the data enable signal line are disposed separately from each other.

公开(公告)号：US09818767B2

公开(公告)日：2017-11-14

申请号：US14500412

申请日：2014-09-29

申请人： LG DISPLAY CO., LTD.

发明人： Hyun Seok Hong ,  Jung Eun Ahn ,  In Kang

IPC分类号： H01L29/08 ,  H01L35/24 ,  H01L51/00 ,  H01L27/12 ,  G02F1/1362

CPC分类号： H01L27/124 ,  G02F1/136227 ,  G02F1/136286 ,  H01L27/1248 ,  H01L27/1255 ,  H01L27/1259

摘要： Disclosed is a display device that may include a pixel electrode formed on source and drain electrodes, the pixel electrode electrically connected with the drain electrode, and a first protection electrode formed on a second metal pattern, the first protection electrode electrically connected with the second metal pattern and at least partially covering the second metal pattern; and a connection electrode formed on a passivation film, the connection electrode connected with a first metal pattern through a first contact hole, and connected with the first protection electrode through a second contact hole, wherein the first protection electrode is formed of the same material as that of the pixel electrode.

公开(公告)号：US09583511B2

公开(公告)日：2017-02-28

申请号：US14584918

申请日：2014-12-29

申请人： LG Display Co., Ltd.

发明人： In Kang ,  Tae-Yong Jung ,  Tae-Keun Lee

IPC分类号： H01L27/12 ,  H01L29/66 ,  H01L29/786

CPC分类号： H01L27/124 ,  G02F1/13454 ,  G09G3/3677 ,  G09G2300/0408 ,  H01L27/1248 ,  H01L27/1259 ,  H01L29/66765 ,  H01L29/78669

摘要： An array substrate includes: a substrate; a gate connecting line on the substrate in a gate circuit area; a gate insulating layer on the gate connecting line; an active pattern on the gate insulating layer; a source connecting line and a pixel pattern sequentially disposed on the active pattern; an interlayer insulating layer and an organic pattern sequentially disposed on the gate insulating layer; a first passivation layer on the organic pattern; and a conductive pattern on the first passivation layer, the conductive pattern coupled to the gate connecting line and to the pixel pattern.

摘要翻译： 阵列基板包括：基板; 栅极电路区域中的衬底上的栅极连接线; 栅极连接线上的栅极绝缘层; 栅极绝缘层上的有源图案; 源连接线和顺序设置在有源图案上的像素图案; 顺序地设置在所述栅绝缘层上的层间绝缘层和有机图案; 有机图案上的第一钝化层; 以及在所述第一钝化层上的导电图案，所述导电图案耦合到所述栅极连接线和所述像素图案。