公开(公告)号：US20150287911A1

公开(公告)日：2015-10-08

申请号：US14611717

申请日：2015-02-02

Applicant: Kyoung-Sun KIM ,  Woo-Jin KIM ,  Ken TOKASHIKI

Inventor： Kyoung-Sun KIM ,  Woo-Jin KIM ,  Ken TOKASHIKI

IPC: H01L43/12 ,  H01L27/22

CPC classification number: H01L43/12 ,  G11C11/161 ,  H01L27/228

Abstract: In a method of manufacturing a MRAM device, a lower electrode is formed on a substrate. A first magnetic layer, a tunnel barrier layer, and a second magnetic layer are sequentially formed on the lower electrode layer. An etching mask is formed on the second magnetic layer. An ion beam etching process in which a first ion beam and a second ion beam are simultaneously emitted onto the substrate is performed to form a MTJ structure including a first magnetic layer pattern, a tunnel layer pattern, and a second magnetic layer pattern from the first magnetic layer, the tunnel barrier layer, and the second magnetic layer, respectively, the MTJ structure has no by-products remaining after the ion beam etching process is performed.

Abstract translation: 在制造MRAM器件的方法中，在基片上形成下电极。 第一磁性层，隧道势垒层和第二磁性层依次形成在下部电极层上。 在第二磁性层上形成蚀刻掩模。 执行其中第一离子束和第二离子束同时发射到衬底上的离子束蚀刻工艺，以形成包括第一磁性层图案，隧道层图案和第二磁性层图案的MTJ结构 磁性层，隧道势垒层和第二磁性层，在执行离子束蚀刻处理之后，MTJ结构没有剩余副产物。

公开(公告)号：US20090209134A1

公开(公告)日：2009-08-20

申请号：US12428530

申请日：2009-04-23

Applicant: Sung-Joo PARK ,  Kyoung-Sun KIM ,  Jung-Joon LEE ,  Jea-Eun LEE

Inventor： Sung-Joo PARK ,  Kyoung-Sun KIM ,  Jung-Joon LEE ,  Jea-Eun LEE

IPC: H01R13/66

CPC classification number: H01R12/83 ,  H01R13/62988 ,  H01R13/631 ,  H05K1/0295 ,  H05K1/117 ,  H05K2201/09954 ,  H05K2201/10159

Abstract: A memory module socket disposed on a principal surface of a mainboard, and adapted to mechanically receive and electrically connect a memory module with a mainboard, the memory module socket including a first unit socket having a plurality of first socket pins adapted to electrically connect a first connector disposed on an edge of the memory module, and a second unit socket having a plurality of second socket pins adapted to electrically connect to a second connector disposed on the memory module orthogonal to the first connector, wherein the memory module as installed in the memory module socket is parallel to the principal surface of the mainboard.

Abstract translation: 存储模块插座，设置在主板的主表面上，并且适于机械地接收和电连接存储器模块与主板，所述存储器模块插座包括第一单元插座，所述第一单元插座具有多个第一插座引脚，所述第一插座引脚适于电连接第一 连接器，其设置在存储器模块的边缘上，以及第二单元插座，其具有多个第二插座引脚，其适于电连接到设置在与第一连接器正交的存储器模块上的第二连接器，其中存储器模块安装在存储器 模块插座平行于主板的主表面。

公开(公告)号：US20080038961A1

公开(公告)日：2008-02-14

申请号：US11836286

申请日：2007-08-09

Applicant: Sung-Joo PARK ,  Kyoung-Sun KIM ,  Jung-Joon LEE ,  Jea-Eun LEE

Inventor： Sung-Joo PARK ,  Kyoung-Sun KIM ,  Jung-Joon LEE ,  Jea-Eun LEE

IPC: H01R24/00

CPC classification number: H01R12/83 ,  H01R13/62988 ,  H01R13/631 ,  H05K1/0295 ,  H05K1/117 ,  H05K2201/09954 ,  H05K2201/10159

Abstract: A memory module socket disposed on a principal surface of a mainboard, and adapted to mechanically receive and electrically connect a memory module with a mainboard, the memory module socket including a first unit socket having a plurality of first socket pins adapted to electrically connect a first connector disposed on an edge of the memory module, and a second unit socket having a plurality of second socket pins adapted to electrically connect to a second connector disposed on the memory module orthogonal to the first connector, wherein the memory module as installed in the memory module socket is parallel to the principal surface of the mainboard.

Abstract translation: 存储模块插座，设置在主板的主表面上，并且适于机械地接收和电连接存储器模块与主板，所述存储器模块插座包括第一单元插座，所述第一单元插座具有多个第一插座引脚，所述第一插座引脚适于电连接第一 连接器，其设置在存储器模块的边缘上，以及第二单元插座，其具有多个第二插座引脚，其适于电连接到设置在与第一连接器正交的存储器模块上的第二连接器，其中存储器模块安装在存储器 模块插座平行于主板的主表面。