公开(公告)号：US10999000B2

公开(公告)日：2021-05-04

申请号：US16162014

申请日：2018-10-16

Applicant: Korea Advanced Institute of Science and Technology

Inventor： Jeongseok Ha ,  Sangseok Yun ,  Sanghun Im

IPC: H04W52/26 ,  H04W52/24 ,  H04K3/00 ,  H04K1/02 ,  H04W52/20 ,  H04W52/16 ,  H04W52/42

Abstract: Disclosed are a secure communication device and a secure communication method using an artificial noise scheme. The secure communication method between a multi-antenna legal transmission device and a multi-antenna legal reception device includes determining a power allocation ratio for a system parameter, by the legal reception device, generating a transmission signal including a secret information message based on the determined power allocation ratio and artificial noise, and transmitting the generated transmission signal to the legal reception device.

公开(公告)号：US10038517B2

公开(公告)日：2018-07-31

申请号：US15151927

申请日：2016-05-11

Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE ,  KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY

Inventor： Byung-Jae Kwak ,  Jeongseok Ha ,  Sanghun Im ,  Sangseok Yun

IPC: H04K1/00 ,  H04L9/08 ,  H04W12/04

CPC classification number: H04K1/00 ,  H04L9/0875 ,  H04L2209/80 ,  H04W12/003 ,  H04W12/04

Abstract: A method and apparatus for generating a secret key includes: acquiring a random sequence by use of reciprocity of a radio channel; generating the secret key based on the random sequence; and stopping generating the secret key when it is determined that the radio channel is flat based on flatness measured from the radio channel.

公开(公告)号：US20220121387A1

公开(公告)日：2022-04-21

申请号：US17076274

申请日：2020-10-21

Applicant: Korea Advanced Institute of Science and Technology

Inventor： Jeongseok Ha ,  Seokju Han ,  Jieun Oh

IPC: G06F3/06

Abstract: Disclosed is a method for estimating a read reference voltage for a flash memory using a neural network and an apparatus therefor. According to an embodiment of the inventive concept, a method for reading a flash memory may include receiving predetermined variable values with respect to a flash memory, estimating a read reference voltage corresponding to the received variable values, using a neural network of a pre-trained learning model with respect to the variable values, and reading the flash memory, using the estimated read reference voltage. The method may further include updating the learning model of the neural network by reflecting a difference in characteristics between individual chips constituting the flash memory.

公开(公告)号：US11283470B2

公开(公告)日：2022-03-22

申请号：US16917165

申请日：2020-06-30

Applicant: Korea Advanced Institute of Science and Technology

Inventor： Jeongseok Ha ,  Kyung Mok Oh

IPC: H03M13/25 ,  H03M13/09 ,  H03M13/00 ,  H03M13/11 ,  H03M13/01 ,  H03M13/13

Abstract: A method for constructing parity-check concatenated polar codes and an apparatus therefor are disclosed. According to an embodiment of the inventive concept, a method for constructing a polar code includes receiving a code length, a message length, and channel information, generating an information set and a parity set of polar codes based on the received code length, the received message length, and the received channel information, and generating a parity node including the information set of elements based on the generated information set and the generated parity set.