公开(公告)号：US5063526A

公开(公告)日：1991-11-05

申请号：US57850

申请日：1987-06-03

申请人： Koichi Kagawa ,  Chung-Li Yu ,  Shinkyo Kaku ,  Vinod Menon

发明人： Koichi Kagawa ,  Chung-Li Yu ,  Shinkyo Kaku ,  Vinod Menon

IPC分类号： G06T3/60

CPC分类号： G06T3/606

摘要： An apparatus for rotating bit-mapped data includes a specially designed data array (9) that includes a normal port (10) for accessing horizontal words of data and a rotated port (15) for accessing vertical words of data. In addition, address generating logic (6) is provided that automatically generates proper address seqences for accessing the normal words or the vertical words as appropriate during a rotation operation. The apparatus is cascadable (FIG. 29) to provide effectively any size data array.

摘要翻译： 用于旋转位映射数据的装置包括专门设计的数据阵列（9），其包括用于访问数据的水平字的正常端口（10）和用于访问数据的垂直字的旋转端口（15）。 此外，提供地址生成逻辑（6），其在旋转操作期间适当地自动产生用于访问正常字或垂直字的适当地址顺序。 该装置是可级联的（图29），以有效地提供任何尺寸的数据阵列。

公开(公告)号：US4992956A

公开(公告)日：1991-02-12

申请号：US107723

申请日：1987-10-08

申请人： Shinkyo Kaku ,  Chung-Li Yu ,  Greg W. Barr ,  Steven Gary ,  David R. Staab ,  George W. Li ,  Anan Nagarajan ,  Shabbir M. Latif

发明人： Shinkyo Kaku ,  Chung-Li Yu ,  Greg W. Barr ,  Steven Gary ,  David R. Staab ,  George W. Li ,  Anan Nagarajan ,  Shabbir M. Latif

IPC分类号： B41J2/44 ,  G06F3/12 ,  G06K15/00 ,  G06K15/12

CPC分类号： G06F3/1297 ,  G06F3/1293 ,  G06K15/00 ,  G06K15/1276 ,  G06K15/128 ,  G06K2215/0065 ,  G06K2215/008 ,  G06K2215/0094

摘要： A device controls in real time the assembly of data for a bit map scanning device, such as a laser printer, under supervisory control of a host processor. The image data words are stored in a source memory and assembled in a video buffer, and automatically scanned out to the scanning device. The host processor generates a simplified set of control words that defines graphics, text and layout of the page to be assembled. A raster interface synchronizes the output of the assembled data with the scanning device. Three basic modes are supported: (1) dispatch mode, (2) font read/write mode, and (3) graphics load mode. The dispatch mode is the normal operational mode which provides for dispatching data from a source memory location to the video memory and for supplying data from the video memory out to the raster printer. The font read/write mode gives the host the ability to read/write font or graphics data from/to the source memory or the video memory. The graphics load mode provides for transfer of a bit mapped window data to the video memory from the processor. The video memory can be divided into two bands.

公开(公告)号：US4839738A

公开(公告)日：1989-06-13

申请号：US41261

申请日：1987-04-22

申请人： Shinkyo Kaku ,  Chung-Li Yu

发明人： Shinkyo Kaku ,  Chung-Li Yu

IPC分类号： H04N1/417

CPC分类号： H04N1/4175

摘要： A decoder receives a series of input words defining variable length facsimile codes and generates pixel data to form a facsimile of an image. A code windowing apparatus selects a variable length code from the received series of words. A decoding ROM generates intermediate codes and code window control signals in response to the selected variable length codes. A reference windowing apparatus connected to receive pixel data generated during the decode of a previous scan line of the facsimile, selects a reference window of pixel data from a previous scan line. A color change detector indentifies a position of a color change picture element in the reference window. Output pixel data is generated in response to the intermediate codes and the position of the color change picture element in the reference window.

公开(公告)号：US4807043A

公开(公告)日：1989-02-21

申请号：US29832

申请日：1987-03-24

申请人： Shinkyo Kaku ,  Chung-Li Yu

发明人： Shinkyo Kaku ,  Chung-Li Yu

IPC分类号： H04N1/417 ,  H04N1/413

CPC分类号： H04N1/4175

摘要： Binary image data is converted to CCITT standardized coded data by utilizing two barrel shift registers for selecting a window of image data from a reference line and from a coding line, two color changing detectors for converting the image data in a window to color changing codes, and one specially designed state machine for generating facsimile coded data from those color changing codes. The state machine operates on color change location data for the selected window to generate intermediate codes. The intermediate codes are then translated to an output format such as the CCITT standard.

公开(公告)号：US5027357A

公开(公告)日：1991-06-25

申请号：US258240

申请日：1988-10-14

申请人： Chung-Li Yu ,  Edward T. Pak ,  Ho-Ming Leung

发明人： Chung-Li Yu ,  Edward T. Pak ,  Ho-Ming Leung

IPC分类号： G06F11/10 ,  G06F3/06 ,  G11B20/18 ,  H03M13/00 ,  H03M13/09 ,  H03M13/15

CPC分类号： H03M13/091 ,  H03M13/15 ,  H03M13/158 ,  H03M13/1515

摘要： Occurrence of uncorrectable errors in a stored sector of data which includes a data block, an error checking and correcting (ECC) block and an error detecting (CRC) block is detected. ECC logic is connected to a data bus and responsive to the ECC block in the sector, for generating an error polynomial identifying a location and a value for correctable errors in the sector. CRC logic is connected to the data bus and responsive to the CRC block in the sector for generating a syndrome identifying detected errors in the data block. An evaluation logic circuit is included that is coupled to the ECC logic and the CRC logic and responsive to the error polynomial and the syndrome for generating an uncorrectable error signal if the detected errors do not match the correctable errors. The error checking and correcting code is a Reed-Solomon code as in the X3B11 standard. Likewise the CRC code is a Reed-Solomon code as in the X3B11 standard. The evaluation logic implements a reverse CRC generation polynomial having a plurality of terms in the same order as the error polynomial. Detection logic receives the plurality of terms of the error polynomial, generates an estimated CRC syndrome based on the reverse CRC generation polynomial, and generates the uncorrectable error signal if the estimated CRC syndrome is not equal to the generated CRC syndrome.

公开(公告)号：US5157669A

公开(公告)日：1992-10-20

申请号：US690114

申请日：1991-04-23

申请人： Chung-Li Yu ,  Edward T. Pak ,  Ho-Ming Leung

发明人： Chung-Li Yu ,  Edward T. Pak ,  Ho-Ming Leung

IPC分类号： H03M13/09 ,  H03M13/15

CPC分类号： H03M13/158 ,  H03M13/09 ,  H03M13/15 ,  H03M13/1515

摘要： Occurrence of uncorrectable errors in a stored sector of data which includes a data block, an error checking and correcting (ECC) block and an error detecting (CRC) block is detected. ECC logic is connected to a data bus and responsive to the ECC block in the sector, for generating an error polynomial identifying a location and a value for correctable errors in the sector. CRC logic is connected to the data bus and responsive to the CRC block in the sector for generating a syndrome identifying detected errors in the data block. An evaluation logic circuit is included that is coupled to the ECC logic and the CRC logic and responsive to the error polynomial and the syndrome for generating an uncorrectable error signal if the detected errors do not match the correctable errors. The error checking and correcting code is a Reed-Solomon code as in the X3B11 standard. Likewise the CRC code is a Reed-Solomon code as in the X3B11 standard. The evaluation logic implements a reverse CRC generation polynomial having a plurality of terms in the same order as the error polynomial. Detection logic receives the plurality of terms of the error polynomial, generates an estimated CRC syndrome based on the reverse CRC generation polynomial, and generates the uncorrectable error signal if the estimated CRC syndrome is not equal to the generated CRC syndrome.

摘要翻译： 检测存储的包括数据块，错误检查和校正（ECC）块和错误检测（CRC）块的数据的存储扇区中的不可校正错误的发生。 ECC逻辑连接到数据总线并响应扇区中的ECC块，用于生成识别位置的错误多项式和扇区中的可校正错误的值。 CRC逻辑连接到数据总线，并响应扇区中的CRC块，用于产生识别数据块中检测到的错误的校正子。 包括评估逻辑电路，其耦合到ECC逻辑和CRC逻辑，并且如果检测到的错误与可校正的错误不匹配，则响应于错误多项式和校正子来产生不可校正的误差信号。 错误检查和纠正代码是一个Reed-Solomon代码，如X3B11标准。 同样地，CRC码是如X3B11标准中的Reed-Solomon码。 评估逻辑实现具有与误差多项式相同顺序的多个项的反向CRC生成多项式。 检测逻辑接收错误多项式的多个项，根据反向CRC生成多项式生成估计的CRC校正子，如果估计的CRC校验不等于生成的CRC校验子，则生成不可校正的误差信号。