公开(公告)号：US20220376697A1

公开(公告)日：2022-11-24

申请号：US17687110

申请日：2022-03-04

Applicant: KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY

Inventor： SeongHwan Cho ,  Junseok Hong ,  Pangi Park

IPC: H03M1/12

Abstract: The present disclosure discloses a band-pass analog-to-digital converter (ADC) using a bidirectional voltage-controlled oscillator (VCO) including a first converter configured to receive an analog input signal and quantize the analog input signal according to a first clock signal to output a first digital signal, a second converter configured to receive the analog input signal and quantize the analog input signal in a time-interleaving manner according to a second clock signal, which has a phase opposite to that of the first clock signal, to output a second digital signal, and a multiplexer configured to receive the first and second digital signals and select one of the two signals in response to the first clock signal to finally output a digital output signal.

公开(公告)号：US11838028B2

公开(公告)日：2023-12-05

申请号：US17687110

申请日：2022-03-04

Applicant: KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY

Inventor： SeongHwan Cho ,  Junseok Hong ,  Pangi Park

IPC: H03M1/00 ,  H03M1/12

CPC classification number: H03M1/1215 ,  H03M1/1245

Abstract: The present disclosure discloses a band-pass analog-to-digital converter (ADC) using a bidirectional voltage-controlled oscillator (VCO) including a first converter configured to receive an analog input signal and quantize the analog input signal according to a first clock signal to output a first digital signal, a second converter configured to receive the analog input signal and quantize the analog input signal in a time-interleaving manner according to a second clock signal, which has a phase opposite to that of the first clock signal, to output a second digital signal, and a multiplexer configured to receive the first and second digital signals and select one of the two signals in response to the first clock signal to finally output a digital output signal.