公开(公告)号：US20190222220A1

公开(公告)日：2019-07-18

申请号：US16194824

申请日：2018-11-19

Applicant: KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY

Inventor： Seung-Tak RYU ,  Dongjin CHANG

IPC: H03M1/10 ,  H03M1/08

Abstract: An electronic circuit includes a reference ADC, a delay circuit, and a main ADC. The reference ADC converts an input signal to an upper bit string of output data, in response to a reference clock. The delay circuit delays a source clock by a delay time to output a main clock. The main ADC converts the input signal to a lower bit string of the output data, in response to the main clock. When a value of the most significant bit included in the lower bit string is identical to a value of the bit which is adjacent to the most significant bit and lower than the most significant bit, the delay time is adjusted based on a direction in which a level of the input signal is changed and the value of the most significant bit of the lower bit string.