Guided Metrology Based on Wafer Topography
    2.
    发明申请

    公开(公告)号:US20180315670A1

    公开(公告)日:2018-11-01

    申请号:US15814884

    申请日:2017-11-16

    Abstract: A wafer topography measurement system can be paired with a scanning electron microscope. A topography threshold can be applied to wafer topography data about the wafer, which was obtained with the wafer topography measurement system. A metrology sampling plan can be generated for the wafer. This metrology sampling plan can include locations in the wafer topography data above the topography threshold. The scanning electron microscope can scan the wafer using the metrology sampling plan and identify defects.

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