Detecting defects on a wafer
    1.
    发明授权
    Detecting defects on a wafer 有权
    检测晶圆上的缺陷

    公开(公告)号:US09355208B2

    公开(公告)日:2016-05-31

    申请号:US14321565

    申请日:2014-07-01

    CPC classification number: G06F17/5081 G01N21/9501 G06F17/5045 H01L22/12

    Abstract: Systems and methods for detecting defects on a wafer are provided. One method includes determining locations of all instances of a weak geometry in a design for a wafer. The locations include random, aperiodic locations. The weak geometry includes one or more features that are more prone to defects than other features in the design. The method also includes scanning the wafer with a wafer inspection system to thereby generate output for the wafer with one or more detectors of the wafer inspection system. In addition, the method includes detecting defects in at least one instance of the weak geometry based on the output generated at two or more instances of the weak geometry in a single die on the wafer.

    Abstract translation: 提供了用于检测晶片上的缺陷的系统和方法。 一种方法包括在晶片的设计中确定弱几何的所有实例的位置。 这些位置包括随机,不定期的位置。 弱几何包括与设计中的其他特征相比更容易出现缺陷的一个或多个特征。 该方法还包括用晶片检查系统扫描晶片,从而通过晶片检查系统的一个或多个检测器产生用于晶片的输出。 此外,该方法包括基于在晶片上的单个管芯中的弱几何形状的两个或多个实例处产生的输出来检测弱几何形状的至少一个实例中的缺陷。

    Methods and Systems for Detecting Repeating Defects on Semiconductor Wafers Using Design Data
    2.
    发明申请
    Methods and Systems for Detecting Repeating Defects on Semiconductor Wafers Using Design Data 有权
    使用设计数据检测半导体晶片重复缺陷的方法和系统

    公开(公告)号:US20150012900A1

    公开(公告)日:2015-01-08

    申请号:US14321565

    申请日:2014-07-01

    CPC classification number: G06F17/5081 G01N21/9501 G06F17/5045 H01L22/12

    Abstract: Systems and methods for detecting defects on a wafer are provided. One method includes determining locations of all instances of a weak geometry in a design for a wafer. The locations include random, aperiodic locations. The weak geometry includes one or more features that are more prone to defects than other features in the design. The method also includes scanning the wafer with a wafer inspection system to thereby generate output for the wafer with one or more detectors of the wafer inspection system. In addition, the method includes detecting detects in at least one instance of the weak geometry based on the output generated at two or more instances of the weak geometry in a single die on the wafer.

    Abstract translation: 提供了用于检测晶片上的缺陷的系统和方法。 一种方法包括在晶片的设计中确定弱几何的所有实例的位置。 这些位置包括随机,不定期的位置。 弱几何包括与设计中的其他特征相比更容易出现缺陷的一个或多个特征。 该方法还包括用晶片检查系统扫描晶片,从而通过晶片检查系统的一个或多个检测器产生用于晶片的输出。 此外,该方法包括基于在晶片上的单个管芯中的弱几何形状的两个或多个实例处产生的输出来检测至少一个弱几何形状的检测。

    Setting up a wafer inspection process using programmed defects
    3.
    发明授权
    Setting up a wafer inspection process using programmed defects 有权
    使用编程缺陷设置晶圆检查过程

    公开(公告)号:US09347862B2

    公开(公告)日:2016-05-24

    申请号:US14303601

    申请日:2014-06-13

    CPC classification number: G01N1/28 G01N21/9501 H01L22/12 H01L22/30

    Abstract: Methods and systems for setting up a wafer inspection process using programmed defects are provided. One method includes altering a design for a dummy area of a production chip such that printing of the dummy area on a wafer results in printing of a variety of defects. Two or more of the defects have different types, one or more different characteristics, different contexts in the design, or a combination thereof. The dummy area printed on a wafer may then be scanned with two or more optical modes of an inspection system to determine which of the optical mode(s) are better for defect detection. Additional areas of the wafer may then be scanned with the optical mode(s) that are better for defect detection to determine noise information. The noise information may then be used to select one or more of the optical modes for use in a wafer inspection process.

    Abstract translation: 提供了使用编程缺陷设置晶圆检查过程的方法和系统。 一种方法包括改变生产芯片的虚拟区域的设计,使得晶片上的虚拟区域的打印导致打印各种缺陷。 两个或更多个缺陷具有不同的类型,一个或多个不同特征,设计中的不同上下文或其组合。 然后可以用检查系统的两个或多个光学模式扫描印刷在晶片上的虚拟区域,以确定哪种光学模式对于缺陷检测更好。 然后可以利用更好的缺陷检测以确定噪声信息的光学模式来扫描晶片的附加区域。 然后可以使用噪声信息来选择在晶片检查过程中使用的一种或多种光学模式。

    Setting Up a Wafer Inspection Process Using Programmed Defects
    4.
    发明申请
    Setting Up a Wafer Inspection Process Using Programmed Defects 有权
    使用程序缺陷设置晶圆检查过程

    公开(公告)号:US20150042978A1

    公开(公告)日:2015-02-12

    申请号:US14303601

    申请日:2014-06-13

    CPC classification number: G01N1/28 G01N21/9501 H01L22/12 H01L22/30

    Abstract: Methods and systems for setting up a wafer inspection process using programmed defects are provided. One method includes altering a design for a dummy area of a production chip such that printing of the dummy area on a wafer results in printing of a variety of defects. Two or more of the defects have different types, one or more different characteristics, different contexts in the design, or a combination thereof. The dummy area printed on a wafer may then be scanned with two or more optical modes of an inspection system to determine which of the optical mode(s) are better for defect detection. Additional areas of the wafer may then be scanned with the optical mode(s) that are better for defect detection to determine noise information. The noise information may then be used to select one or more of the optical modes for use in a wafer inspection process.

    Abstract translation: 提供了使用编程缺陷设置晶圆检查过程的方法和系统。 一种方法包括改变生产芯片的虚拟区域的设计,使得晶片上的虚拟区域的打印导致打印各种缺陷。 两个或更多个缺陷具有不同的类型,一个或多个不同特征,设计中的不同上下文或其组合。 然后可以用检查系统的两个或多个光学模式扫描印刷在晶片上的虚拟区域,以确定哪种光学模式对于缺陷检测更好。 然后可以利用更好的缺陷检测以确定噪声信息的光学模式来扫描晶片的附加区域。 然后可以使用噪声信息来选择在晶片检查过程中使用的一种或多种光学模式。

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