公开(公告)号：US20230146289A1

公开(公告)日：2023-05-11

申请号：US17930556

申请日：2022-09-08

Applicant: KABUSHIKI KAISHA TOSHIBA

Inventor： Tuan Thanh TA ,  Akihide SAI ,  Yosuke TOYAMA

IPC: G01S7/481 ,  G01S17/10 ,  G01S7/4861 ,  G01S17/931 ,  G01S7/497

CPC classification number: G01S7/4815 ,  G01S17/10 ,  G01S7/4861 ,  G01S7/4817 ,  G01S17/931 ,  G01S7/4972

Abstract: A light projecting apparatus has a plurality of light projectors, each being capable of switching an emission direction and an emission timing of an optical signal, and a plurality of first controllers, each controlling an emission direction and an emission timing of an optical signal emitted from a corresponding light projector among the plurality of light projectors.

公开(公告)号：US20220190812A1

公开(公告)日：2022-06-16

申请号：US17468431

申请日：2021-09-07

Applicant: KABUSHIKI KAISHA TOSHIBA

Inventor： Yosuke TOYAMA ,  Tuan Thanh TA ,  Satoshi KONDO ,  Akihide SAI ,  Toshiki SUGIMOTO ,  Kentaro YOSHIOKA

IPC: H03K3/03 ,  G04F10/00

Abstract: An oscillation circuit has a first oscillator having output nodes of n stages, where n is an integer of 3 or more, a second oscillator having output nodes of n stages, and a third oscillator having output nodes of n stages. An output node at an a-th stage of the first oscillator and an output node at an a-th stage of the second oscillator are connected with each other, where a is an integer of 1 or more and n or less and an output node at a b-th stage of the second oscillator and an output node at a b-th stage of the third oscillator are connected with each other, where b is an integer of 1 or more and n or less different from a.

公开(公告)号：US20220182067A1

公开(公告)日：2022-06-09

申请号：US17468493

申请日：2021-09-07

Applicant: KABUSHIKI KAISHA TOSHIBA

Inventor： Toshiki SUGIMOTO ,  Kentaro YOSHIOKA ,  Akihide SAI ,  Yosuke TOYAMA

IPC: H03M1/12

Abstract: An analog-to-digital converter has a first digital signal generator that generates a first digital signal based on whether or not a sampling signal of an input signal is equal to or lower than a signal corresponding to a second reference signal higher than a first reference signal, a first slope generator to generate a first slope signal that changes with time from the sampled and held signal equal to or lower than the first reference signal, a second slope generator to generate a second slope signal that changes with time from the sampled and held signal to a signal level equal to or lower than the second reference signal, and a second digital signal generator that generates a second digital signal based on a time at which the first slope signal matches the first reference signal or a time at which the second slope signal matches the second reference signal.

公开(公告)号：US20190273483A1

公开(公告)日：2019-09-05

申请号：US16126031

申请日：2018-09-10

Applicant: KABUSHIKI KAISHA TOSHIBA

Inventor： Yosuke TOYAMA ,  Kentaro YOSHIOKA ,  Kohei ONIZUKA

IPC: H03K3/03 ,  H03K5/13

Abstract: According to one embodiment, an information processing device, includes: a digital-to-pulse converter configured to output a pulse signal including a pulse with a pulse length corresponding to a digital input signal; and a bidirectional selective oscillator including a first ring oscillator and a second ring oscillator, the first ring oscillator including a plurality of delay elements connected in a ring shape in a first direction, the second ring oscillator including a plurality of delay elements connected in a ring shape in a second direction reverse to the first direction. The bidirectional selective oscillator is configured to select one of the first ring oscillator and the second ring oscillator depending on a sign of the digital input signal, oscillate the selected ring oscillator during a period when the pulse is outputted, and keep a state of oscillation operation when the pulse stops being outputted.

公开(公告)号：US20170237346A1

公开(公告)日：2017-08-17

申请号：US15393514

申请日：2016-12-29

Applicant: KABUSHIKI KAISHA TOSHIBA

Inventor： Yosuke TOYAMA ,  Taichi OGAWA ,  Takeshi UENO ,  Tetsuro ITAKURA ,  Osamu WATANABE ,  Takayuki MIYAZAKI

IPC: H02M3/157 ,  H02M1/08

CPC classification number: H02M3/157 ,  H02M1/08 ,  H02M3/158 ,  H02M2001/0009 ,  H02M2001/009

Abstract: A DC-DC converter as embodiments of the present invention includes an input terminal, multiple output terminals, an inductor, a first switch, a first condenser, a second switch and a switch controller. One end of the inductor is connected to the input terminal. The first switch is subjected to on-off control to change a current flowing through the inductor. The first condenser has one end connected between the inductor and a first output terminal, which is one of the multiple output terminals, and has the other end connected to a ground. The second switch is connected between the inductor and the first condenser. The switch controller controls the second switch to turn on when the first switch is turned off while a first output voltage from the first output terminal is smaller than a predetermined first threshold value.

公开(公告)号：US20240146228A1

公开(公告)日：2024-05-02

申请号：US18459540

申请日：2023-09-01

Applicant: KABUSHIKI KAISHA TOSHIBA

Inventor： Yosuke TOYAMA ,  Satoshi KONDO ,  Tuan Thanh TA

IPC: H02P27/06 ,  H02P21/14 ,  H02P21/22

CPC classification number: H02P27/06 ,  H02P21/14 ,  H02P21/22

Abstract: A motor control circuit has an n-phase inverter that controls a motor of n-phases (n is an integer of three or more), a current detection circuit that detects a motor current flowing through the motor of the n-phases, and a current control circuit that controls the inverter for each of a control cycle based on a command current and the motor current detected by the current detection circuit. The inverter includes transistor pairs of the n-phases provided for each phase of the motor, and the current control circuit stops, for each of the control cycle, a switching operation in at least one transistor pair of the transistor pairs of the n-phases.

公开(公告)号：US20180006561A1

公开(公告)日：2018-01-04

申请号：US15447589

申请日：2017-03-02

Applicant: Kabushiki Kaisha Toshiba

Inventor： Yosuke TOYAMA ,  Taichi Ogawa ,  Takeshi Ueno ,  Tetsuro Itakura ,  Osamu Watanabe ,  Takayuki Miyazaki

IPC: H02M3/158

CPC classification number: H02M3/158 ,  H02M1/08 ,  H02M2001/009

Abstract: According to one embodiment, a DC-DC converter, includes: an inductor configured to be supplied with an input voltage; a plurality of rectifiers connected in parallel to the inductor; a plurality of p-MOS transistors connected in series to the respective rectifiers; a switch configured to connect an output side of the inductor to a reference potential; and a control circuit configured to control the p-MOS transistors and the switch. The control circuit performs control to supply a voltage to turn on a first p-MOS transistor selected from among the p-MOS transistors to a gate terminal of the first p-MOS transistor, and to supply a voltage depending on an output voltage of the first p-MOS transistor to a gate terminal of a second p-MOS transistor other than the first p-MOS transistor among the p-MOS transistors.