公开(公告)号：US09461925B1

公开(公告)日：2016-10-04

申请号：US14014849

申请日：2013-08-30

Applicant: Juniper Networks, Inc.

Inventor： Craig R. Frink ,  Monte Becker ,  Nayan S. Patel

IPC: G06F15/16 ,  H04L12/825

CPC classification number: H04L47/25

Abstract: In some embodiments, an apparatus includes a rate module implemented in at least one of a memory or a processing device that can be operatively coupled to a set of rate counters. Each rate counter is associated with a different network device associated with a level within the hierarchy of a network. The rate module can receive from a schedule module a signal to begin execution of a first page of a first rate program and can send during a first time period transmission credits to a first subset of rate counters. The rate module can send during a second time period transmission credits to a second subset of rate counters based on the execution of a page of a second rate program where the priority of the second rate program is no lower than a priority of the first rate program.

Abstract translation: 在一些实施例中，装置包括在存储器或处理设备中的至少一个中实现的速率模块，其可操作地耦合到一组速率计数器。 每个速率计数器与与网络层级内的级别相关联的不同网络设备相关联。 速率模块可以从调度模块接收信号以开始执行第一速率程序的第一页，并且可以在第一时间段期间将传输信用发送到速率计数器的第一子集。 速率模块可以在第二时间段期间，基于第二速率程序的页面的执行，在第二速率程序的优先级不低于第一速率程序的优先级的情况下，向第二子帧速率计数器发送传输信用 。

公开(公告)号：US11509590B2

公开(公告)日：2022-11-22

申请号：US17178033

申请日：2021-02-17

Applicant: Juniper Networks, Inc.

Inventor： Craig R. Frink ,  Yongseok Yi ,  Weidong Xu ,  Monte Becker

IPC: H04L47/25 ,  H04L43/04 ,  H04L43/0829

Abstract: A network device may receive one or more packets, and may determine a flow control parameter, a rate limiting parameter, and a statistical sampling parameter associated with a slow counter. The network device may determine whether the flow control parameter satisfies a first threshold, whether the rate limiting parameter satisfies a second threshold, and whether the statistical sampling parameter satisfies a third threshold. The network device may identify a counter event associated with one of the one or more packets, and may selectively assign the counter event to a fast counter when at least one of the first threshold, the second threshold, or the third threshold being satisfied, or to the slow counter when none of the first threshold, the second threshold, and the third threshold being satisfied.

公开(公告)号：US10079769B1

公开(公告)日：2018-09-18

申请号：US15282630

申请日：2016-09-30

Applicant: Juniper Networks, Inc.

Inventor： Craig R. Frink ,  Monte Becker ,  Nayan S. Patel

IPC: G06F15/16 ,  H04L12/825 ,  H04L12/947

CPC classification number: H04L47/25 ,  H04L49/25

Abstract: In some embodiments, an apparatus includes a rate module implemented in at least one of a memory or a processing device that can be operatively coupled to a set of rate counters. Each rate counter is associated with a different network device associated with a level within the hierarchy of a network. The rate module can receive from a schedule module a signal to begin execution of a first page of a first rate program and can send during a first time period transmission credits to a first subset of rate counters. The rate module can send during a second time period transmission credits to a second subset of rate counters based on the execution of a page of a second rate program where the priority of the second rate program is no lower than a priority of the first rate program.