公开(公告)号：US08125236B2

公开(公告)日：2012-02-28

申请号：US12662015

申请日：2010-03-29

申请人： Jung-Kuk Lee ,  Seung-Hee Lee

发明人： Jung-Kuk Lee ,  Seung-Hee Lee

IPC分类号： G01R31/00 ,  G01R31/306

CPC分类号： G11C29/56 ,  G11C5/04 ,  G11C29/56016 ,  G11C2029/5602

摘要： A main board according to example embodiments may include a substrate and at least one socket. The at least one socket may directly connect a memory module to the substrate in a direction parallel to the substrate. A memory mounting test system including the main board may occupy a smaller space, because the memory module is connected to the main board in a direction parallel to the main board.

摘要翻译： 根据示例性实施例的主板可以包括基板和至少一个插座。 至少一个插座可以在平行于衬底的方向上将存储器模块直接连接到衬底。 由于存储器模块沿与主板平行的方向连接到主板，所以包括主板的存储器安装测试系统可能占用更小的空间。

公开(公告)号：US20100257416A1

公开(公告)日：2010-10-07

申请号：US12662015

申请日：2010-03-29

申请人： Jung-Kuk Lee ,  Seung-Hee Lee

发明人： Jung-Kuk Lee ,  Seung-Hee Lee

IPC分类号： G11C29/08 ,  G06F13/14 ,  G06F11/26

CPC分类号： G11C29/56 ,  G11C5/04 ,  G11C29/56016 ,  G11C2029/5602

摘要： A main board according to example embodiments may include a substrate and at least one socket. The at least one socket may directly connect a memory module to the substrate in a direction parallel to the substrate. A memory mounting test system including the main board may occupy a smaller space, because the memory module is connected to the main board in a direction parallel to the main board.

摘要翻译： 根据示例性实施例的主板可以包括基板和至少一个插座。 至少一个插座可以在平行于衬底的方向上将存储器模块直接连接到衬底。 由于存储器模块沿与主板平行的方向连接到主板，所以包括主板的存储器安装测试系统可能占用更小的空间。

公开(公告)号：US07606110B2

公开(公告)日：2009-10-20

申请号：US11029008

申请日：2005-01-05

申请人： You-Keun Han ,  Hui-Chong Shin ,  Seung-Jin Seo ,  Byung-Se So ,  Young-Man Ahn ,  Seung-Man Shin ,  Jung-Kuk Lee ,  Ho-Suk Lee

发明人： You-Keun Han ,  Hui-Chong Shin ,  Seung-Jin Seo ,  Byung-Se So ,  Young-Man Ahn ,  Seung-Man Shin ,  Jung-Kuk Lee ,  Ho-Suk Lee

IPC分类号： G11C8/00

CPC分类号： G11C5/04 ,  G06F13/1689 ,  G11C7/22 ,  G11C7/222 ,  G11C8/18 ,  G11C11/401 ,  G11C29/12015 ,  G11C29/14

摘要： A memory module, a memory unit, and a hub with a non-periodic clock and methods for using the same. An example memory module may include a phased locked loop, receiving an external, periodic clock and generating one or more internal periodic clocks and a plurality of memory units, receiving one of the internal periodic clocks or a non-periodic clock from an external source.

摘要翻译： 存储器模块，存储器单元和具有非周期性时钟的集线器及其使用方法。 示例性存储器模块可以包括相位锁定环路，接收外部周期性时钟并且生成一个或多个内部周期性时钟和多个存储器单元，从外部源接收内部周期性时钟之一或非周期性时钟。

公开(公告)号：US07319635B2

公开(公告)日：2008-01-15

申请号：US11254696

申请日：2005-10-21

申请人： Young-Man Ahn ,  Seung-Jin Seo ,  Seung-Hee Mun ,  Jong-Cheol Seo ,  Jung-Kuk Lee ,  Soon-Deok Jang

发明人： Young-Man Ahn ,  Seung-Jin Seo ,  Seung-Hee Mun ,  Jong-Cheol Seo ,  Jung-Kuk Lee ,  Soon-Deok Jang

IPC分类号： G11C8/00

CPC分类号： G11C7/22 ,  G11C7/222 ,  G11C11/4076

摘要： A memory module and related method are disclosed. The memory module comprises a clock generator configured to generate first and second internal clock signals in relation to an external clock signal, and a register configured to receive the first and second internal clock signals. The register stores an external control/address signal in response to the first internal clock signal and transmits an internal control/address signal derived from the external control/address in response to the second internal control/address signal.

摘要翻译： 公开了一种存储器模块及相关方法。 存储器模块包括被配置为相对于外部时钟信号产生第一和第二内部时钟信号的时钟发生器以及被配置为接收第一和第二内部时钟信号的寄存器。 寄存器响应于第一内部时钟信号存储外部控制/地址信号，并响应于第二内部控制/地址信号发送从外部控制/地址导出的内部控制/地址信号。

公开(公告)号：US07233157B2

公开(公告)日：2007-06-19

申请号：US11025093

申请日：2004-12-28

申请人： Jung-Kuk Lee ,  Young-Man Ahn ,  Seung-Man Shin ,  Jong-Cheol Seo

发明人： Jung-Kuk Lee ,  Young-Man Ahn ,  Seung-Man Shin ,  Jong-Cheol Seo

IPC分类号： G01R31/02 ,  G01R31/26

CPC分类号： G01R31/2889 ,  G01R1/07378

摘要： A test board for a high-frequency system level test: The test board includes a main board having through holes filled with a conductive material. These holes may be located at a portion of the main board from which an existing module socket has been removed. An interface board has surface mounted device (SMD) pads on front and rear surfaces. The SMD pads on the front surface of the interface board are connected with the SMD pads on the rear surface thereof through cross connection wiring within the interface board for a pin swap. The through holes of the main board are connected with the SMD pads on the rear surface of the interface board via iron cores fixed at a guide. A test module socket is mounted on surfaces of the SMD pads on the front surface of the interface board.

摘要翻译： 用于高频系统级测试的测试板：测试板包括具有填充有导电材料的通孔的主板。 这些孔可以位于主板的已经从其移除的现有模块插座的部分。 接口板在前表面和后表面上具有表面贴装（SMD）贴片。 接口板前表面上的SMD焊盘通过接口板中的交叉连接线与后表面的SMD焊盘连接，用于引脚互换。 主板的通孔通过固定在导轨上的铁芯与接口板背面的SMD焊盘连接。 测试模块插座安装在接口板正面的SMD焊盘表面。

公开(公告)号：US20060280024A1

公开(公告)日：2006-12-14

申请号：US11254696

申请日：2005-10-21

申请人： Young-Man Ahn ,  Seung-Jin Seo ,  Seung-Hee Mun ,  Jong-Cheol Seo ,  Jung-Kuk Lee ,  Soon-Deok Jang

发明人： Young-Man Ahn ,  Seung-Jin Seo ,  Seung-Hee Mun ,  Jong-Cheol Seo ,  Jung-Kuk Lee ,  Soon-Deok Jang

IPC分类号： G11C8/00

CPC分类号： G11C7/22 ,  G11C7/222 ,  G11C11/4076

摘要： A memory module and related method are disclosed. The memory module comprises a clock generator configured to generate first and second internal clock signals in relation to an external clock signal, and a register configured to receive the first and second internal clock signals. The register stores an external control/address signal in response to the first internal clock signal and transmits an internal control/address signal derived from the external control/address in response to the second internal control/address signal.

摘要翻译： 公开了一种存储器模块及相关方法。 存储器模块包括被配置为相对于外部时钟信号产生第一和第二内部时钟信号的时钟发生器以及被配置为接收第一和第二内部时钟信号的寄存器。 寄存器响应于第一内部时钟信号存储外部控制/地址信号，并响应于第二内部控制/地址信号发送从外部控制/地址导出的内部控制/地址信号。

公开(公告)号：US20060044927A1

公开(公告)日：2006-03-02

申请号：US11029008

申请日：2005-01-05

申请人： You-Keun Han ,  Hui-Chong Shin ,  Seung-Jin Seo ,  Byung-Se So ,  Young-Man Ahn ,  Seung-Man Shin ,  Jung-Kuk Lee ,  Ho-Suk Lee

发明人： You-Keun Han ,  Hui-Chong Shin ,  Seung-Jin Seo ,  Byung-Se So ,  Young-Man Ahn ,  Seung-Man Shin ,  Jung-Kuk Lee ,  Ho-Suk Lee

IPC分类号： G11C8/02

CPC分类号： G11C5/04 ,  G06F13/1689 ,  G11C7/22 ,  G11C7/222 ,  G11C8/18 ,  G11C11/401 ,  G11C29/12015 ,  G11C29/14

摘要： A memory module, a memory unit, and a hub with a non-periodic clock and methods for using the same. An example memory module may include a phased locked loop, receiving an external, periodic clock and generating one or more internal periodic clocks and a plurality of memory units, receiving one of the internal periodic clocks or a non-periodic clock from an external source.

公开(公告)号：US20050258846A1

公开(公告)日：2005-11-24

申请号：US11025093

申请日：2004-12-28

申请人： Jung-Kuk Lee ,  Young-Man Ahn ,  Seung-Man Shin ,  Jong-Cheol Seo

发明人： Jung-Kuk Lee ,  Young-Man Ahn ,  Seung-Man Shin ,  Jong-Cheol Seo

IPC分类号： G01R31/26 ,  G01R1/073 ,  G01R31/02 ,  G01R31/28 ,  H01L21/66

CPC分类号： G01R31/2889 ,  G01R1/07378

摘要： A test board for a high-frequency system level test: The test board includes a main board having through holes filled with a conductive material. These holes may be located at a portion of the main board from which an existing module socket has been removed. An interface board has surface mounted device (SMD) pads on front and rear surfaces. The SMD pads on the front surface of the interface board are connected with the SMD pads on the rear surface thereof through cross connection wiring within the interface board for a pin swap. The through holes of the main board are connected with the SMD pads on the rear surface of the interface board via iron cores fixed at a guide. A test module socket is mounted on surfaces of the SMD pads on the front surface of the interface board.

摘要翻译： 用于高频系统级测试的测试板：测试板包括具有填充有导电材料的通孔的主板。 这些孔可以位于主板的已经从其移除的现有模块插座的部分。 接口板在前表面和后表面上具有表面贴装（SMD）贴片。 接口板前表面上的SMD焊盘通过接口板中的交叉连接线与后表面的SMD焊盘连接，用于引脚互换。 主板的通孔通过固定在导轨上的铁芯与接口板背面的SMD焊盘连接。 测试模块插座安装在接口板正面的SMD焊盘表面。