公开(公告)号：US4491953A

公开(公告)日：1985-01-01

申请号：US416380

申请日：1982-09-09

Applicant: Jules A. Bellisio ,  Arthur B. Larsen

Inventor： Jules A. Bellisio ,  Arthur B. Larsen

IPC: H03M7/30 ,  G06T9/00 ,  H04B14/04 ,  H04B14/06 ,  H04N7/26 ,  H04N11/04 ,  H03K13/22

CPC classification number: H04N11/046 ,  H04B14/046 ,  H04N19/90

Abstract: A dual mode encoding/decoding technique for use in digital systems wherein transmitted digital words are limited, on average, to an alotted number of bits. The transmitted digital words are coded into first and second modes. The first coding mode utilizes predictive differential coding to provide a precision which can be greater than that obtainable by coding information solely with the allotted number of bits, while the second mode assures at least a minimum precision for the allotted number of bits. The first coding mode is transmitted as long as a preselected precision is provided. If not, the second coding mode is transmitted. In the disclosed embodiment, the dual mode encoding/decoding technique is applied to the transmission of color video signals.

Abstract translation: 一种用于数字系统的双模式编码/解码技术，其中传输的数字字被平均地限制为多个位数。 发送的数字字被编码为第一和第二模式。 第一编码模式利用预测差分编码提供的精度可以大于仅通过分配的比特数编码信息可获得的精度，而第二模式确保所分配的比特数的至少最小精度。 只要提供预选精度，就传送第一编码模式。 如果不是，则发送第二编码模式。 在所公开的实施例中，双模式编码/解码技术被应用于彩色视频信号的传输。

公开(公告)号：US4161634A

公开(公告)日：1979-07-17

申请号：US929431

申请日：1978-07-31

Applicant: Jules A. Bellisio

Inventor： Jules A. Bellisio

IPC: H04B17/40 ,  H04Q9/16 ,  H04B3/46

CPC classification number: H04Q9/16 ,  H04B17/406

Abstract: A system is described for randomly addressing any one of a plurality of remotely located stations connected by means of an electromagnetic wavepath. At the addressing point an addressing signal, comprising a series of m signal bursts, is generated and coupled onto the wavepath (11), where m is an integer and corresponds to the number of stations the addressed station is away from the addressing point. Each remote station includes means (33, 34, 41, 43) for deleting one signal burst and retransmitting the remaining signal bursts. Each station also includes means (34, 38, 42, 43, 44, 50, 51) for recognizing when only a single signal burst is received and for responding in a prescribed manner. By means of such a "count-down" technique, the m.sup.th station from the addressing station is accessed. it is an advantage of such a system that the addressing circuit is the same at all the remote stations.

Abstract translation: 描述了用于随机地寻址通过电磁波路径连接的多个远程位置的任何一个的系统。 在寻址点，生成包括一系列m个信号脉冲串的寻址信号，并将其耦合到波形路径（11）上，其中m是整数，并且对应于寻址站远离寻址点的站的数量。 每个远程站包括用于删除一个信号脉冲串并重传剩余信号脉冲串的装置（33,34,41,43）。 每个站还包括用于识别何时仅接收到单个信号突发并且以规定的方式进行响应的装置（34,38,42,43,44,50,51）。 通过这种“倒计时”技术，访问来自寻址站的第m个站。 这样的系统的优点在于所有远程站的寻址电路是相同的。

公开(公告)号：US4354054A

公开(公告)日：1982-10-12

申请号：US254914

申请日：1981-04-16

Applicant: Jules A. Bellisio

Inventor： Jules A. Bellisio

IPC: H04B17/40 ,  H04J3/08 ,  H04B3/46

CPC classification number: H04B17/40

Abstract: A status reporting arrangement for a digital transmission system (10) has a plurality of stations (11, 12, 13) in a tandem configuration. Each station (such as 11) includes a reporting circuit (30) arranged for receiving (36) a train of messages (91, 96), each message originating from a different preceding station (such as 13 and 12) in the tandem configuration, followed by a received caboose signal (97). Each reporting circuit responds in turn to the train of messages and the received caboose signal by retransmitting (60) the train of messages (91, 96) but deletes the received caboose signal (97). The reporting circuit, in response to detection of the received caboose signal, appends to the retransmitted train of messages a message (100) from the local station and a new caboose signal (102).

Abstract translation: 数字传输系统（10）的状态报告装置具有串联配置的多个站（11,12,13）。 每个站（例如11）包括布置成用于接收（36）串列消息（91,96）的报告电路（30），每个消息源自串联配置中的不同的先前站（例如13和12） 接着是接收到的caboose信号（97）。 每个报告电路通过重发（60）消息列（91,96）而依次读取消息列和接收的空中信号，但删除接收到的空中信号（97）。 报告电路响应于接收到的caboose信号的检测，将从本地站的消息（100）附加到重传的消息列，以及新的caboose信号（102）。

公开(公告)号：US4719624A

公开(公告)日：1988-01-12

申请号：US864037

申请日：1986-05-16

Applicant: Jules A. Bellisio

Inventor： Jules A. Bellisio

IPC: H04J3/00 ,  H04J3/04 ,  H04J3/06 ,  H04J3/12

CPC classification number: H04J3/047 ,  H04J3/0605 ,  H04J3/0623

Abstract: A synchronous PCM digital transmission system including multilevel multiplexing wherein the higher order multiplexers interleave two or more tributary signals each of which comprises a multiplexed plurality of subtributaries. Multiplexer framing is achieved by means of an auxiliary frame pattern or byte, F.sub.T, which is slidable within the subscriber-defined frames. Each multiplexer in the system re-frames or slides F.sub.T and its associated overhead so that the F.sub.T bytes at each multiplexer are synchronized. The F.sub.T bytes can be used to frame or synchronize scrambling and de-scrambling circuitry. This concept provides multiplexer framing and yields high-speed multiplexed signals which are all exact multiples of the system clock rate, using relatively simple circuitry compared to competitive designs.

Abstract translation: 一种包括多电平多路复用的同步PCM数字传输系统，其中高阶多路复用器交织两个或多个支路信号，每个支路信号包括多路复用的多个分支。 通过辅助帧模式或字节FT实现多路复用器成帧，FT可在用户定义的帧内滑动。 系统中的每个多路复用器重新帧或幻灯片FT及其相关的开销，使得每个复用器处的FT字节同步。 FT字节可用于对加扰和解扰电路进行帧或同步。 该概念提供多路复用器成帧并产生高速复用信号，它们都是系统时钟速率的精确倍数，与竞争性设计相比，使用相对简单的电路。

公开(公告)号：US4215245A

公开(公告)日：1980-07-29

申请号：US974375

申请日：1978-12-29

Applicant: Jules A. Bellisio

Inventor： Jules A. Bellisio

IPC: H04L25/02 ,  H04L25/49 ,  H04L7/02

CPC classification number: H04L25/4906 ,  H04L25/0262 ,  Y10S370/914

Abstract: A synchronous digital transmission system (12), operating over a prescribed range of bit rates, is interfaced with subscribers (10, 11) whose data sources and receivers have different bit rates by means of transmitter and receiver interface networks (13, 14). The transmitter interface network (13) comprises means (20, 21, 23, 24) for phase-locking an integral subharmonic f.sub.o /N of a variable frequency oscillator (22) to an input clock signal, f.sub.1, associated with an input data stream, and means (25, 27) for encoding the data stream for operation at a bit rate corresponding to the fundamental frequency, f.sub.o, of the local oscillator (22) and including one code violation at a prescribed rate, f.sub.1 /M, related to the input clock frequency f.sub.1. The receiver interface network (14) includes means (30, 31, 32) for decoding the received signal and for recovering the input data stream and clock signal.

Abstract translation: 在规定的比特率范围内运行的同步数字传输系统（12）与其数据源和接收机借助于发射机和接收机接口网络（13,14）具有不同比特率的用户（10,11）进行接口。 发射机接口网络（13）包括用于将可变频率振荡器（22）的整体次谐波fo / N相位锁定到与输入数据流相关联的输入时钟信号f1的装置（20,21,23,24） 以及用于以与本地振荡器（22）的基频fo对应的比特率进行操作的数据流进行编码的装置（25,27），并且包括与规定速率f1 / M相关的一个代码违例 输入时钟频率f1。 接收机接口网络（14）包括用于对接收到的信号进行解码并用于恢复输入数据流和时钟信号的装置（30,31,32）。