摘要:
In accordance with an example embodiment of the present invention, a method is disclosed. A first image display mode is provided at a display of an apparatus. The first image display mode includes mapping first data from a display frame memory. The first data corresponds to the first image display mode. A second image display mode is provided at the display. The second image display mode includes mapping second data from the display frame memory. The second data corresponds to the second image display mode. The first image display mode is switched to the second image display mode when only a portion of the second data is detected at the display frame memory.
摘要:
An apparatus including at least one light source; a selective attenuation element, used for a plurality of adjacent pixels and configured to attenuate light from the at least one light source; and a group of adjacent mono-chrome light filters, used for the plurality of adjacent pixels, the group including a first mono-chrome light filter, for a first one of the plurality of adjacent pixels, configured to filter light transmitted via the selective attenuation element for the first one of the adjacent pixels; and a second mono-chrome light filter, for a second one of the plurality of adjacent pixels, configured to filter light transmitted via the selective attenuation element for the second one of the adjacent pixels.
摘要:
Within one gate selection time interval: first pixel information is driven from a source line to a liquid crystal LC element of a pixel; and second pixel information is driven from the source line to a memory element of the pixel; and the second pixel information is driven from the memory element of the pixel to the LC element of the pixel. Respecting a second pixel, similar occurs for third and fourth pixel information within a second gate selection time interval, such that the second pixel information is driven from the memory element of the first pixel to the LC element of the first pixel simultaneous with the third pixel information being driven from the source line to the LC element of the second pixel. Such simultaneous driving enables a faster refresh rate and/or larger displays. Various circuit-specific implementations are shown.
摘要:
Within one gate selection time interval: first pixel information is driven from a source line to a liquid crystal LC element of a pixel; and second pixel information is driven from the source line to a memory element of the pixel; and the second pixel information is driven from the memory element of the pixel to the LC element of the pixel. Respecting a second pixel, similar occurs for third and fourth pixel information within a second gate selection time interval, such that the second pixel information is driven from the memory element of the first pixel to the LC element of the first pixel simultaneous with the third pixel information being driven from the source line to the LC element of the second pixel. Such simultaneous driving enables a faster refresh rate and/or larger displays. Various circuit-specific implementations are shown.
摘要:
An apparatus with a first and second touch screen, where the first touch screen has a plurality of first touch sensors formed as a first grid of rows and columns and the second touch screen has a plurality of second touch sensors formed as a second grid of rows and columns. A first processor detects touch areas by scanning through the first touch sensors in a predetermined order along the rows and columns. A second processor detects touch areas by scanning through the second touch sensors in a predetermined order along the rows and columns. A controller causes that the first and second processors scan the first and second grids synchronized such that when the first and second touch screens are arranged side by side, neighboring first and second touch sensors are scanned substantially simultaneously.
摘要:
The present invention provides methods and modules allowing for mapping of interface signals at for instance multi-line buses. A mapping of internal signal order schemes to external signal order schemes is enabled such that upon configuration any interface signals may carried on any lines of a multi-line bus. The configurability may obtained by the implementation of mapping logics and mapping algorithms, which associates external interface terminal to signal association to internal interface terminal to signal association in a configurable manner.
摘要:
The present invention provides methods and modules allowing for mapping of interface signals at for instance multi-line buses. A mapping of internal signal order schemes to external signal order schemes is enabled such that upon configuration any interface signals may carried on any lines of a multi-line bus. The configurability may obtained by the implementation of mapping logics and mapping algorithms, which associates external interface terminal to signal association to internal interface terminal to signal association in a configurable manner.
摘要:
It is disclosed to measure the impedance of a read-out line. The read-out line includes at least two cascaded electrical circuit segments, each electrical circuit segment including two longitudinal arms, wherein one of the longitudinal arms includes an electrical component, and a lateral arm including a switch configured to close in the presence of an object in the vicinity of the switch. The measured impedance of the read-out line can be compared to a preset value corresponding to an allowable value of the impedance of the read-out line.
摘要:
In one exemplary embodiment of the invention, an apparatus includes: at least one functional circuit; and an electrically-conductive protective layer on a protected surface of the apparatus, where the protective layer is arranged to be substantially opaque to incident light, where at least one portion of the protective layer is electrically isolated from a remainder of the protective layer, where the at least one portion is a plate of a capacitor for coupling at least one signal to said at least one functional circuit.
摘要:
An apparatus comprises at least one component arranged to be supplied with at least one analog value. In order to enable a testing of the at least one component, the apparatus further comprises at least one comparator configured to compare at least one analog value, which corresponds to at least one analog value supplied to the at least one component, with at least one analog value read from the at least one component. The comparator is moreover configured to provide a result of the comparison.