公开(公告)号：US20080056345A1

公开(公告)日：2008-03-06

申请号：US11708557

申请日：2007-02-21

申请人： Jong-Hoon Kim ,  Jae-Jun Lee ,  Kwang-Soo Park

发明人： Jong-Hoon Kim ,  Jae-Jun Lee ,  Kwang-Soo Park

IPC分类号： H03K7/08

CPC分类号： H03M5/145

摘要： Data transmission system and method are provided. The transmission system includes a data converter and data restoring unit. The data converter converts N-bit first data to be transmitted into M-bit second data, where M is greater than N and the second data is arranged in a minimum unit greater than 1, each minimum unit including at least successive data bits having the same phase. The transmitter compresses the second data prior to transmission via a channel having performance characteristics defining a minimum pulse width, and a receiver receives and de-compresses the transmitted second data. The data restoring unit then restores the first data from the second.

摘要翻译： 提供数据传输系统和方法。 传输系统包括数据转换器和数据恢复单元。 数据转换器将要发送的N位第一数据转换成M位第二数据，其中M大于N，第二数据以大于1的最小单位排列，每个最小单位包括至少连续的数据位， 相同阶段 发射机在通过具有定义最小脉冲宽度的性能特征的信道进行传输之前压缩第二数据，并且接收机接收和解压缩传输的第二数据。 数据恢复单元然后从第二数据恢复第一数据。

公开(公告)号：US20080012661A1

公开(公告)日：2008-01-17

申请号：US11797988

申请日：2007-05-09

申请人： Jong-Hoon Kim ,  Jae-Jun Lee ,  Moon-Jung Kim ,  Kwang-Soo Park ,  Young-Chan Jang

发明人： Jong-Hoon Kim ,  Jae-Jun Lee ,  Moon-Jung Kim ,  Kwang-Soo Park ,  Young-Chan Jang

IPC分类号： H03H7/24

CPC分类号： H05K1/0231 ,  H01L23/64 ,  H01L2924/0002 ,  H01L2924/3011 ,  H05K1/0233 ,  H05K1/165 ,  H05K2201/09309 ,  H05K2201/10022 ,  H05K2201/1003 ,  H01L2924/00

摘要： A semiconductor device, a method related to the semiconductor device, and a printed circuit board are disclosed. The semiconductor device includes a chip, a package including a plurality of power voltage terminals and a plurality of ground voltage terminals, wherein the chip is disposed in the package. The semiconductor device further includes an impedance circuit connected between a DC component power voltage terminal and a ground voltage, wherein the DC component power voltage terminal is one of the plurality of power voltage terminals, and an AC component interrupter connected between the DC component power voltage terminal and a power voltage. Both the AC component and a DC component of the power voltage are applied to each of the power voltage terminals except the DC component second power voltage terminal, and the ground voltage is applied to each of the ground voltage terminals.

摘要翻译： 公开了半导体器件，与半导体器件相关的方法和印刷电路板。 半导体器件包括芯片，包括多个电源电压端子和多个接地电压端子的封装，其中芯片设置在封装中。 半导体装置还包括连接在直流分量电源端子和接地电压之间的阻抗电路，其中直流分量电源电压端子是多个电源电压端子中的一个，以及连接在直流分量电源电压 端子和电源电压。 除了直流分量第二电力电压端子之外，将电力电压的交流分量和直流分量都施加到各电力电压端子，并且将接地电压施加到每个接地电压端子。

公开(公告)号：US08107271B2

公开(公告)日：2012-01-31

申请号：US11649805

申请日：2007-01-05

申请人： Kwang-Soo Park ,  Jae-Jun Lee ,  Jong-Hoon Kim ,  Hoe-Ju Chung

发明人： Kwang-Soo Park ,  Jae-Jun Lee ,  Jong-Hoon Kim ,  Hoe-Ju Chung

IPC分类号： G11C5/06

CPC分类号： H03H7/38

摘要： A termination circuit is connected to an input buffer receiving a data signal, and includes at least one termination resistor connected to the input buffer for impedance matching. At least one switch controls a connection between the input buffer and a corresponding one of the at least one termination resistors. A control signal generator generates a control signal for selectively enabling the termination circuit by controlling each of the at least one switches. The control signal has an input period less than or equal to an input period of a data signal.

摘要翻译： 终端电路连接到接收数据信号的输入缓冲器，并且包括连接到输入缓冲器以用于阻抗匹配的至少一个终端电阻器。 至少一个开关控制输入缓冲器与至少一个终端电阻器中相应的一个之间的连接。 控制信号发生器产生控制信号，用于通过控制至少一个开关中的每个开关来选择性地启用终端电路。 控制信号的输入周期小于或等于数据信号的输入周期。

公开(公告)号：US20070205848A1

公开(公告)日：2007-09-06

申请号：US11649805

申请日：2007-01-05

申请人： Kwang-Soo Park ,  Jae-Jun Lee ,  Jong-Hoon Kim ,  Hoe-Ju Chung

发明人： Kwang-Soo Park ,  Jae-Jun Lee ,  Jong-Hoon Kim ,  Hoe-Ju Chung

IPC分类号： H01P5/12 ,  H03H7/38

CPC分类号： H03H7/38

摘要： A termination circuit is connected to an input buffer receiving a data signal, and includes at least one termination resistor connected to the input buffer for impedance matching. At least one switch controls a connection between the input buffer and a corresponding one of the at least one termination resistors. A control signal generator generates a control signal for selectively enabling the termination circuit by controlling each of the at least one switches. The control signal has an input period less than or equal to an input period of a data signal.

摘要翻译： 终端电路连接到接收数据信号的输入缓冲器，并且包括连接到输入缓冲器以用于阻抗匹配的至少一个终端电阻器。 至少一个开关控制输入缓冲器与至少一个终端电阻器中相应的一个之间的连接。 控制信号发生器产生控制信号，用于通过控制至少一个开关中的每个开关来选择性地启用终端电路。 控制信号的输入周期小于或等于数据信号的输入周期。

公开(公告)号：US08089860B2

公开(公告)日：2012-01-03

申请号：US11708557

申请日：2007-02-21

申请人： Jong-Hoon Kim ,  Jae-Jun Lee ,  Kwang-Soo Park

发明人： Jong-Hoon Kim ,  Jae-Jun Lee ,  Kwang-Soo Park

IPC分类号： H04J7/00

CPC分类号： H03M5/145

摘要： Data transmission system and method are provided. The transmission system includes a data converter and data restoring unit. The data converter converts N-bit first data to be transmitted into M-bit second data, where M is greater than N and the second data is arranged in a minimum unit greater than 1, each minimum unit including at least successive data bits having the same phase. The transmitter compresses the second data prior to transmission via a channel having performance characteristics defining a minimum pulse width, and a receiver receives and de-compresses the transmitted second data. The data restoring unit then restores the first data from the second.

摘要翻译： 提供数据传输系统和方法。 传输系统包括数据转换器和数据恢复单元。 数据转换器将要发送的N位第一数据转换成M位第二数据，其中M大于N，第二数据以大于1的最小单位排列，每个最小单位包括至少连续的数据位， 相同阶段 发射机在通过具有定义最小脉冲宽度的性能特征的信道进行传输之前压缩第二数据，并且接收机接收和解压缩传输的第二数据。 数据恢复单元然后从第二数据恢复第一数据。

公开(公告)号：US07724535B2

公开(公告)日：2010-05-25

申请号：US11797988

申请日：2007-05-09

申请人： Jong-Hoon Kim ,  Jae-Jun Lee ,  Moon-Jung Kim ,  Kwang-Soo Park ,  Young-Chan Jang

发明人： Jong-Hoon Kim ,  Jae-Jun Lee ,  Moon-Jung Kim ,  Kwang-Soo Park ,  Young-Chan Jang

IPC分类号： H05K7/00

CPC分类号： H05K1/0231 ,  H01L23/64 ,  H01L2924/0002 ,  H01L2924/3011 ,  H05K1/0233 ,  H05K1/165 ,  H05K2201/09309 ,  H05K2201/10022 ,  H05K2201/1003 ,  H01L2924/00

摘要： A semiconductor device, a method related to the semiconductor device, and a printed circuit board are disclosed. The semiconductor device includes a chip, a package including a plurality of power voltage terminals and a plurality of ground voltage terminals, wherein the chip is disposed in the package. The semiconductor device further includes an impedance circuit connected between a DC component power voltage terminal and a ground voltage, wherein the DC component power voltage terminal is one of the plurality of power voltage terminals, and an AC component interrupter connected between the DC component power voltage terminal and a power voltage. Both the AC component and a DC component of the power voltage are applied to each of the power voltage terminals except the DC component second power voltage terminal, and the ground voltage is applied to each of the ground voltage terminals.

摘要翻译： 公开了半导体器件，与半导体器件相关的方法和印刷电路板。 半导体器件包括芯片，包括多个电源电压端子和多个接地电压端子的封装，其中芯片设置在封装中。 半导体装置还包括连接在直流分量电源端子和接地电压之间的阻抗电路，其中直流分量电源电压端子是多个电源电压端子中的一个，以及连接在直流分量电源电压 端子和电源电压。 除了直流分量第二电力电压端子之外，将电力电压的交流分量和直流分量都施加到各电力电压端子，并且将接地电压施加到每个接地电压端子。

公开(公告)号：US08116093B2

公开(公告)日：2012-02-14

申请号：US12132309

申请日：2008-06-03

申请人： Kwang-Soo Park ,  Jong-Hoon Kim

发明人： Kwang-Soo Park ,  Jong-Hoon Kim

IPC分类号： H05K7/12 ,  H05K1/11

CPC分类号： H05K1/114 ,  H05K2201/094 ,  H05K2201/10734

摘要： A printed circuit board (PCB) includes a substrate having a first group of at least two via holes and a second group of at least two via holes formed therein, a first pad set of terminal pads and a second pad set of terminal pads formed on the substrate, and a first group of conductive connection members and a second group of conductive connection members formed in the substrate. The first group of the via holes are surrounded by the first pad set of the terminal pads and the second group of the via holes are surrounded by the second pad set of the terminal pads. The first and the second groups of conductive connection members fill up the first and second groups of the via holes. The first group of the conductive connection members are connected to the first pad set of the terminal pads and the second group of the conductive connection members are connected to the second pad set of the terminal pads.

摘要翻译： 印刷电路板（PCB）包括：具有至少两个通孔的第一组的基板和形成在其中的至少两个通孔的第二组，第一焊盘组的端子焊盘和形成在 所述基板以及形成在所述基板中的第一组导电连接构件和第二组导电连接构件。 第一组通孔由端子焊盘的第一焊盘组围绕，并且第二组通孔被端子焊盘的第二焊盘组包围。 第一和第二组导电连接构件填充第一组和第二组通孔。 第一组导电连接构件连接到端子焊盘的第一焊盘组，并且第二组导电连接构件连接到端子焊盘的第二焊盘组。

公开(公告)号：US20080298034A1

公开(公告)日：2008-12-04

申请号：US12132309

申请日：2008-06-03

申请人： Kwang-Soo Park ,  Jong-Hoon Kim

发明人： Kwang-Soo Park ,  Jong-Hoon Kim

IPC分类号： H05K7/06 ,  H05K1/11

CPC分类号： H05K1/114 ,  H05K2201/094 ,  H05K2201/10734

摘要： A printed circuit board (PCB) includes a substrate having a first group of at least two via holes and a second group of at least two via holes formed therein, a first pad set of terminal pads and a second pad set of terminal pads formed on the substrate, and a first group of conductive connection members and a second group of conductive connection members formed in the substrate. The first group of the via holes are surrounded by the first pad set of the terminal pads and the second group of the via holes are surrounded by the second pad set of the terminal pads. The first and the second groups of conductive connection members fill up the first and second groups of the via holes. The first group of the conductive connection members are connected to the first pad set of the terminal pads and the second group of the conductive connection members are connected to the second pad set of the terminal pads.

摘要翻译： 印刷电路板（PCB）包括：具有至少两个通孔的第一组的基板和形成在其中的至少两个通孔的第二组，第一焊盘组的端子焊盘和形成在 所述基板以及形成在所述基板中的第一组导电连接构件和第二组导电连接构件。 第一组通孔由端子焊盘的第一焊盘组围绕，并且第二组通孔被端子焊盘的第二焊盘组包围。 第一和第二组导电连接构件填充第一组和第二组通孔。 第一组导电连接构件连接到端子焊盘的第一焊盘组，并且第二组导电连接构件连接到端子焊盘的第二焊盘组。

公开(公告)号：US07778042B2

公开(公告)日：2010-08-17

申请号：US12143126

申请日：2008-06-20

申请人： Jae-Jun Lee ,  Joo-Sun Choi ,  Kyu-Hyoun Kim ,  Kwang-Soo Park

发明人： Jae-Jun Lee ,  Joo-Sun Choi ,  Kyu-Hyoun Kim ,  Kwang-Soo Park

IPC分类号： H05K1/11

CPC分类号： G11C5/063

摘要： A memory system has first and second primary memories and first and second secondary memories coupled to the first and second primary memories, respectively, the coupling comprising at least one point-to-point connection. A memory module includes at least two of the first and second primary and first and second secondary memories. A first connection element, such as a connector or solder, connects the memory module to a mother board. A second connection element, such as a connector or solder, connects at least one other of the first and second primary and first and second secondary memories to the mother board. At least one of the memories on the first memory module is coupled to at least one of the other memories. The memory system also includes a memory controller which is connected to the primary memories by a point-to-two-point link.

摘要翻译： 存储器系统具有第一和第二主存储器以及分别耦合到第一和第二主存储器的第一和第二辅助存储器，耦合器包括至少一个点到点连接。 存储器模块包括第一和第二主要和第一和第二辅助存储器中的至少两个。 诸如连接器或焊料的第一连接元件将存储器模块连接到母板。 诸如连接器或焊料的第二连接元件将第一和第二初级和第二和第二辅助存储器中的至少一个连接到母板。 第一存储器模块上的至少一个存储器耦合到至少一个其他存储器。 存储器系统还包括存储器控制器，其通过点对二点链接连接到主存储器。

公开(公告)号：US20080247212A1

公开(公告)日：2008-10-09

申请号：US12143126

申请日：2008-06-20

申请人： Jae-Jun Lee ,  Joo-Sun Choi ,  Kyu-Hyoun Kim ,  Kwang-Soo Park

发明人： Jae-Jun Lee ,  Joo-Sun Choi ,  Kyu-Hyoun Kim ,  Kwang-Soo Park

IPC分类号： G11C5/06

CPC分类号： G11C5/063

摘要： A memory system has first and second primary memories and first and second secondary memories coupled to the first and second primary memories, respectively, the coupling comprising at least one point-to-point connection. A memory module includes at least two of the first and second primary and first and second secondary memories. A first connection element, such as a connector or solder, connects the memory module to a mother board. A second connection element, such as a connector or solder, connects at least one other of the first and second primary and first and second secondary memories to the mother board. At least one of the memories on the first memory module is coupled to at least one of the other memories. The memory system also includes a memory controller which is connected to the primary memories by a point-to-two-point link.

摘要翻译： 存储器系统具有第一和第二主存储器以及分别耦合到第一和第二主存储器的第一和第二辅助存储器，耦合器包括至少一个点到点连接。 存储器模块包括第一和第二主要和第一和第二辅助存储器中的至少两个。 诸如连接器或焊料的第一连接元件将存储器模块连接到母板。 诸如连接器或焊料的第二连接元件将第一和第二初级和第二和第二辅助存储器中的至少一个连接到母板。 第一存储器模块上的至少一个存储器耦合到至少一个其他存储器。 存储器系统还包括存储器控制器，其通过点对二点链接连接到主存储器。