公开(公告)号：US20190081635A1

公开(公告)日：2019-03-14

申请号：US16191427

申请日：2018-11-14

Applicant: Intel Corporation

Inventor： Peter Tsugio Kurahashi ,  Cho-ying Lu ,  Triveni Suryakant Rane ,  Carlos Fernando Nieva-Lozano ,  Hyung-Jin Lee

IPC: H03M1/12 ,  H03M1/38

Abstract: There is disclosed in one example a communication apparatus, including: an analog data source; a digital communication interface; and an analog-to-digital converter (ADC) circuit assembly, including: an analog sample input; an input clock to provide frequency fin; a time-interleaved front end to interleave n samples of the analog sample input; and an ADC array including n successive-approximation register (SAR) ADCs, the SAR ADCs including self-clocked comparators and configured to operate at a frequency no less than f in n .

公开(公告)号：US10715165B2

公开(公告)日：2020-07-14

申请号：US16191427

申请日：2018-11-14

Applicant: Intel Corporation

Inventor： Peter Tsugio Kurahashi ,  Cho-ying Lu ,  Triveni Suryakant Rane ,  Carlos Fernando Nieva-Lozano ,  Hyung-Jin Lee

IPC: H03M1/00 ,  H03M1/12 ,  H03M1/38 ,  H03M1/46 ,  H04L12/933 ,  H03K5/24 ,  H03M1/10

Abstract: There is disclosed in one example a communication apparatus, including: an analog data source; a digital communication interface; and an analog-to-digital converter (ADC) circuit assembly, including: an analog sample input; an input clock to provide frequency fin; a time-interleaved front end to interleave n samples of the analog sample input; and an ADC array including n successive-approximation register (SAR) ADCs, the SAR ADCs including self-clocked comparators and configured to operate at a frequency no less than f in n .