公开(公告)号：US09558560B2

公开(公告)日：2017-01-31

申请号：US14210585

申请日：2014-03-14

Applicant: Intel Corporation

Inventor： Avigdor Eldar ,  Noam Teomim ,  Alexandra Manevitch ,  Amos Goldman ,  Liad Aben Zour ,  Orly Weisel ,  Raizy Kellerman

IPC: G06T7/00 ,  G06K9/00

CPC classification number: G06T7/187 ,  G06K9/00973 ,  G06T7/11 ,  G06T7/162 ,  G06T2207/30201

Abstract: Systems and methods may provide for obtaining data associated with an image and using a plurality of threads in a graphics processor to conduct a single instruction multiple data (SIMD) scan of the data. Additionally, systems and methods may provide for generating a plurality of connection tables corresponding to the plurality of threads based on the SIMD scan. In one example, a plurality of threads in the graphics processor are used to conduct a single phase merge of the plurality of connection tables onto a global connected components labeling (CCL) table for the image.

Abstract translation: 系统和方法可以提供用于获得与图像相关联的数据并且使用图形处理器中的多个线程来进行数据的单指令多数据（SIMD）扫描。 此外，系统和方法可以提供用于基于SIMD扫描生成与多个线程相对应的多个连接表。 在一个示例中，图形处理器中的多个线程用于将多个连接表的单相合并进行到用于图像的全局连接分量标签（CCL）表。

公开(公告)号：US10248839B2

公开(公告)日：2019-04-02

申请号：US14953622

申请日：2015-11-30

Applicant: Intel Corporation

Inventor： Ofir Levy ,  Maoz Madmony ,  Orly Weisel

IPC: G06K9/00 ,  G06T7/11 ,  G06T7/187

Abstract: In accordance with some embodiments, connected-component labeling is performed in both the screen dimensions (which may be referred to as the x and y dimensions) and a depth dimension to label objects in a depth image. Then the contour of labeled blobs may be used to identify an object in the depth image. Using contours may be advantageous in some embodiments because it reduces the amount of data that must be handled and the extent of computations, compared to conventional techniques which use bit map based operations.

公开(公告)号：US20240419956A1

公开(公告)日：2024-12-19

申请号：US18749806

申请日：2024-06-21

Applicant: Intel Corporation

Inventor： Eran Ben-Avi ,  Neta Zmora ,  Guy Jacob ,  Lev Faivishevsky ,  Jeremie Dreyfuss ,  Tomer Bar-On ,  Jacob Subag ,  Yaniv Fais ,  Shira Hirsch ,  Orly Weisel ,  Zigi Walter ,  Yarden Oren

IPC: G06N3/063 ,  G06N3/044 ,  G06N3/045 ,  G06N3/084

Abstract: In an example, an apparatus comprises a plurality of execution units comprising and logic, at least partially including hardware logic, to traverse a solution space, score a plurality of solutions to a scheduling deep learning network execution, and select a preferred solution from the plurality of solutions to implement the deep learning network. Other embodiments are also disclosed and claimed.

公开(公告)号：US20180314934A1

公开(公告)日：2018-11-01

申请号：US15499900

申请日：2017-04-28

Applicant: Intel Corporation

Inventor： Eran Ben-Avi ,  Neta Zmora ,  Guy Jacob ,  Lev Faivishevsky ,  Jeremie Dreyfuss ,  Tomer Bar-On ,  Jacob Subag ,  Yaniv Fais ,  Shira Hirsh ,  Orly Weisel ,  Zigi Walter ,  Yarden Oren

IPC: G06N3/08 ,  G06N3/04 ,  G06N3/063

Abstract: In an example, an apparatus comprises a plurality of execution units comprising and logic, at least partially including hardware logic, to traverse a solution space, score a plurality of solutions to a scheduling deep learning network execution, and select a preferred solution from the plurality of solutions to implement the deep learning network. Other embodiments are also disclosed and claimed.

公开(公告)号：US20170154432A1

公开(公告)日：2017-06-01

申请号：US14953622

申请日：2015-11-30

Applicant: Intel Corporation

Inventor： Ofir Levy ,  Maoz Madmony ,  Orly Weisel

IPC: G06T7/00 ,  G06T7/20 ,  G06K9/00

CPC classification number: G06K9/00228 ,  G06K9/00369 ,  G06K9/00375 ,  G06K9/00604 ,  G06K9/4638 ,  G06K2209/21 ,  G06T7/11 ,  G06T7/187 ,  G06T2200/04 ,  G06T2207/10012 ,  G06T2207/10028 ,  G06T2207/30196 ,  G06T2207/30241

Abstract: In accordance with some embodiments, connected-component labeling is performed in both the screen dimensions (which may be referred to as the x and y dimensions) and a depth dimension to label objects in a depth image. Then the contour of labeled blobs may be used to identify an object in the depth image. Using contours may be advantageous in some embodiments because it reduces the amount of data that must be handled and the extent of computations, compared to conventional techniques which use bit map based operations.

公开(公告)号：US12033063B2

公开(公告)日：2024-07-09

申请号：US18174275

申请日：2023-02-24

Applicant: Intel Corporation

Inventor： Eran Ben-Avi ,  Neta Zmora ,  Guy Jacob ,  Lev Faivishevsky ,  Jeremie Dreyfuss ,  Tomer Bar-On ,  Jacob Subag ,  Yaniv Fais ,  Shira Hirsch ,  Orly Weisel ,  Zigi Walter ,  Yarden Oren

IPC: G06N3/06 ,  G06N3/044 ,  G06N3/045 ,  G06N3/063 ,  G06N3/084

CPC classification number: G06N3/063 ,  G06N3/044 ,  G06N3/045 ,  G06N3/084

Abstract: In an example, an apparatus comprises a plurality of execution units comprising and logic, at least partially including hardware logic, to traverse a solution space, score a plurality of solutions to a scheduling deep learning network execution, and select a preferred solution from the plurality of solutions to implement the deep learning network. Other embodiments are also disclosed and claimed.

公开(公告)号：US20230281435A1

公开(公告)日：2023-09-07

申请号：US18174275

申请日：2023-02-24

Applicant: Intel Corporation

Inventor： Eran Ben-Avi ,  Neta Zmora ,  Guy Jacob ,  Lev Faivishevsky ,  Jeremie Dreyfuss ,  Tomer Bar-On ,  Jacob Subag ,  Yaniv Fais ,  Shira Hirsch ,  Orly Weisel ,  Zigi Walter ,  Yarden Oren

IPC: G06N3/063 ,  G06N3/084 ,  G06N3/044 ,  G06N3/045

CPC classification number: G06N3/063 ,  G06N3/084 ,  G06N3/044 ,  G06N3/045

Abstract: In an example, an apparatus comprises a plurality of execution units comprising and logic, at least partially including hardware logic, to traverse a solution space, score a plurality of solutions to a scheduling deep learning network execution, and select a preferred solution from the plurality of solutions to implement the deep learning network. Other embodiments are also disclosed and claimed.

公开(公告)号：US11599777B2

公开(公告)日：2023-03-07

申请号：US15499900

申请日：2017-04-28

Applicant: Intel Corporation

Inventor： Eran Ben-Avi ,  Neta Zmora ,  Guy Jacob ,  Lev Faivishevsky ,  Jeremie Dreyfuss ,  Tomer Bar-On ,  Jacob Subag ,  Yaniv Fais ,  Shira Hirsch ,  Orly Weisel ,  Zigi Walter ,  Yarden Oren

IPC: G06N3/00 ,  G06N3/063 ,  G06N3/084 ,  G06N3/044 ,  G06N3/045

Abstract: In an example, an apparatus comprises a plurality of execution units comprising and logic, at least partially including hardware logic, to traverse a solution space, score a plurality of solutions to a scheduling deep learning network execution, and select a preferred solution from the plurality of solutions to implement the deep learning network. Other embodiments are also disclosed and claimed.