-
1.发明授权公开(公告)号：US12009747B2
公开(公告)日：2024-06-11
申请号：US17133442
申请日：2020-12-23
Applicant: Intel Corporation
Inventor： Tarakesava Reddy Koki , Vinaya Kumar Chandrasekhara , Aiswarya Pious , Nirmala Bailur , Jagadish Vasudeva Singh
CPC classification number: H02M3/158 , G06F1/28 , H02J7/0068 , H02M1/088
Abstract: Techniques and mechanisms for determining a delivery of power by a programmable power supply. In an embodiment, controller circuitry of a platform receives an indication that a load of the platform is to transition to a particular operational mode. Based on a power requirement of the operational mode, the controller circuitry identifies a mode of voltage regulation which is to be provided with converter circuitry of the platform. The controller circuitry signals that a programmable power supply, which is coupled to the platform, is to output a supply voltage at a level which is based on an amount of power loss associated with the mode of voltage regulation. In another embodiment, the controller circuitry identifies the mode of voltage regulation based on an amount of charge which is currently stored by a battery of the platform.
-
公开(公告)号：US20230350479A1
公开(公告)日：2023-11-02
申请号：US17732096
申请日：2022-04-28
Applicant: Intel Corporation
Inventor： Venkataramani Gopalakrishnan , Chuen Ming Tan , Divagar Mohandass , Dmitriy Berchanskiy , Nirmala Bailur , Timothy Smith , Rajaram Regupathy
IPC: G06F1/3215 , G06F1/3212 , G06F1/3296
CPC classification number: G06F1/3215 , G06F1/3212 , G06F1/3296
Abstract: Systems, apparatuses and methods may provide for technology that allocates a portion of operational power in a source device to an external sink device in response to a connection of the external sink device to the source device, detects a low power state with respect to the external sink device, and decreases the portion of operational power allocated to the external sink device in response to the low power state.
-
公开(公告)号：US20250004966A1
公开(公告)日：2025-01-02
申请号：US18345748
申请日：2023-06-30
Applicant: Intel Corporation
Inventor： Huimin Chen , James Akiyama , John Howard , Venkataramani Gopalakrishnan , Nirmala Bailur
Abstract: Systems, apparatus, articles of manufacture, and methods are disclosed to route display stream data. An example system disclosed herein to route display stream data includes a circuit board comprising decoding circuitry to decode Peripheral Component Interconnect Express (PCIe) data packets into a display port stream data, the PCIe data packets encoded by a discrete graphics circuitry, and a Universal Serial Bus (USB) connector on the circuit board coupled to the decoding circuitry, wherein the USB connector is to output the display port stream data.
-
公开(公告)号：US20240330230A1
公开(公告)日：2024-10-03
申请号：US18194262
申请日：2023-03-31
Applicant: Intel Corporation
Inventor： Rajaram Regupathy , Reuven Rozic , Dmitriy Berchanskiy , Nirmala Bailur , Vrukesh V. Panse , Saranya Gopal
CPC classification number: G06F13/4282 , G06F13/382 , G06F2213/0042
Abstract: A data scaling module for USB4 that embodies display driver (DD) and connection manager (CM) operations. Periodic and aperiodic transfer requests are monitored. The periodic BW activity on periodic peripherals, such as display panels (DPs) is monitored, and determinations as to reduced periodic activity on a DP are made. Responsive to receiving a high aperiodic bandwidth request, the original refresh rate for the DP is reduced. The newly freed USB4 BW is provided for the aperiodic task. At completion of the aperiodic task, the DD increases the refresh rate to its original value.
-
公开(公告)号：US20240104043A1
公开(公告)日：2024-03-28
申请号：US17950840
申请日：2022-09-22
Applicant: Intel Corporation
Inventor： Shailendra Singh Chauhan , Nirmala Bailur , Reza M. Zamani , Jackson Chung Peng Kong , Charuhasini Sunder Raman , Venkataramani Gopalakrishnan , Chuen Ming Tan , Sreejith Satheesakurup , Karthi Kaliswamy , Venkata Mahesh Gunnam , Yi Jen Huang , Kie Woon Lim , Dhinesh Sasidaran , Pik Shen Chee , Venkataramana Kotakonda , Kunal A. Shah , Ramesh Vankunavath , Siva Prasad Jangili Ganga , Ravali Pampala , Uma Medepalli , Tomer Savariego , Naznin Banu Wahab , Sindhusha Kodali , Manjunatha Venkatarauyappa , Surendar Jeevarathinam , Madhura Shetty , Deepak Sharma , Rohit Sharad Mahajan
CPC classification number: G06F13/4045 , G06F13/4068 , G06F13/4282 , G06F2213/0026 , G06F2213/0042
Abstract: Embodiments herein relate to a module which can be inserted into or removed from a computing device by a user. The module includes an input-output port which is configured for a desired specification, such as USB-A, USB-C, Thunderbolt, DisplayPort or HDMI. The port can be provided on an expansion card such as an M.2 card for communicating with a host platform. The host platform can communicate with different types of modules in a standardized way so that complexity and costs are reduced. In another aspect, with a dual port module, the host platform can concurrently send/receive power through one port and send/receive data from the other port.
-
Patent Agency Ranking
公开(公告)号：US11451067B2
公开(公告)日：2022-09-20
申请号：US15847862
申请日：2017-12-19
Applicant: Intel Corporation
Inventor： Rajaram Regupathy , Nirmala Bailur , Rajeev Muralidhar
Abstract: A method and device that implements communication over an interconnect to support improved power distribution over the interconnect. The device includes a controller to implement a device policy manager (DPM) to manage power allotment over the interconnect, and a battery feedback mechanism coupled to the controller, the battery feedback mechanism to detect a low or dead battery condition of a connected device over the interconnect and to indicate to the DPM to advertise a higher power charging level to the connected device.
-
7.发明申请公开(公告)号：US20220200452A1
公开(公告)日：2022-06-23
申请号：US17133442
申请日：2020-12-23
Applicant: Intel Corporation
Inventor： Tarakesava Reddy Koki , Vinaya Kumar Chandrasekhara , Aiswarya Pious , Nirmala Bailur , Jagadish Vasudeva Singh
Abstract: Techniques and mechanisms for determining a delivery of power by a programmable power supply. In an embodiment, controller circuitry of a platform receives an indication that a load of the platform is to transition to a particular operational mode. Based on a power requirement of the operational mode, the controller circuitry identifies a mode of voltage regulation which is to be provided with converter circuitry of the platform. The controller circuitry signals that a programmable power supply, which is coupled to the platform, is to output a supply voltage at a level which is based on an amount of power loss associated with the mode of voltage regulation. In another embodiment, the controller circuitry identifies the mode of voltage regulation based on an amount of charge which is currently stored by a battery of the platform.
-
公开(公告)号：US20250053436A1
公开(公告)日：2025-02-13
申请号：US18723551
申请日：2022-02-22
Applicant: Intel Corporation
Inventor： Rajaram Regupathy , Reuven Rozic , Xiong Zhang , Gil Fine , Dmitriy Berchanskiy , Nirmala Bailur , Paul Crutcher
Abstract: In one embodiment, a system comprises: a processor to execute a native operating system (OS); and an interface circuit coupled to the processor, the interface circuit configured to tunnel communications of a plurality of tunneled protocols, the interface circuit to couple to at least one device via a first tunneled protocol, where a connection manager for the interface circuit is to execute in a user space of the native OS. Other embodiments are described and claimed.
-
公开(公告)号：US20250008685A1
公开(公告)日：2025-01-02
申请号：US18216049
申请日：2023-06-29
Applicant: Intel Corporation
Inventor： Jeff Ku , Nirmala Bailur , Min Suet Lim , Tongyan Zhai , Chee Chun Yee , Ruander Cardenas , Lance Lin , Eng Huat Goh , Javed Shaikh , Jun Liao , Kavitha Nagarajan , Tin Poay Chuah , Martin M. Chang , Shantanu D. Kulkarni , Telesphor Kamgaing
Abstract: Systems, apparatus, articles of manufacture, and methods are disclosed for cooling electronic devices. An example apparatus includes a fan module for an electronic device. The fan module includes a first cover; a second cover; an input/output (IO) board adjacent the second cover, the second cover and IO board beneath the first cover; and a fan between the first cover and the second cover, the fan to operate above the second cover and a portion of the IO board.
-
公开(公告)号：US20230282151A1
公开(公告)日：2023-09-07
申请号：US17684981
申请日：2022-03-02
Applicant: Intel Corporation
Inventor： Ankitkumar Navik , Partha Choudhury , Nirmala Bailur , Sailesh Rathi
IPC: G09G3/20
CPC classification number: G09G3/2096 , G09G2360/18
Abstract: Systems, apparatuses and methods may provide for technology that detects a connection of an external display to a computing system containing an internal display and activates frame buffer compression for the external display if one or more conditions are satisfied. In one example, activating frame buffer compression for the external display includes deallocating a display pipe from the internal display, wherein frame buffer compression is enabled for the display pipe, and allocating the display pipe to the external display.
-
-
-
-
-
-
-
-
-
Search Results
11
records
(took 0.038 seconds)
