公开(公告)号：US12197601B2

公开(公告)日：2025-01-14

申请号：US17560193

申请日：2021-12-22

Applicant: Intel Corporation

Inventor： Ren Wang ,  Sameh Gobriel ,  Somnath Paul ,  Yipeng Wang ,  Priya Autee ,  Abhirupa Layek ,  Shaman Narayana ,  Edwin Verplanke ,  Mrittika Ganguli ,  Jr-Shian Tsai ,  Anton Sorokin ,  Suvadeep Banerjee ,  Abhijit Davare ,  Desmond Kirkpatrick ,  Rajesh M. Sankaran ,  Jaykant B. Timbadiya ,  Sriram Kabisthalam Muthukumar ,  Narayan Ranganathan ,  Nalini Murari ,  Brinda Ganesh ,  Nilesh Jain

IPC: G06F15/78 ,  G06F9/50 ,  G06F21/62 ,  G06F21/72

Abstract: Examples described herein relate to offload circuitry comprising one or more compute engines that are configurable to perform a workload offloaded from a process executed by a processor based on a descriptor particular to the workload. In some examples, the offload circuitry is configurable to perform the workload, among multiple different workloads. In some examples, the multiple different workloads include one or more of: data transformation (DT) for data format conversion, Locality Sensitive Hashing (LSH) for neural network (NN), similarity search, sparse general matrix-matrix multiplication (SpGEMM) acceleration of hash based sparse matrix multiplication, data encode, data decode, or embedding lookup.