公开(公告)号：US10175986B2

公开(公告)日：2019-01-08

申请号：US15589510

申请日：2017-05-08

Applicant: Intel Corporation

Inventor： Roger Gramunt ,  Ramon Matas ,  Benjamin C. Chaffin ,  Neal S. Moyer ,  Rammohan Padmanabhan ,  Alexey P. Suprun ,  Matthew G. Smith

IPC: G06F9/30 ,  G06F9/38 ,  G06F11/36 ,  G06F11/34 ,  G06F11/30

Abstract: A processor includes a logic for stateless capture of data linear addresses (DLA) during precise event based sampling (PEBS) for an out-of-order execution engine. The engine may include a PEBS unit with logic to increment a counter each time an instance of a designated micro-op is retired a reorder buffer, capture output DLA referenced by an instance of the micro-op that executes after the counter overflows, set a captured bit associated with a reorder buffer identifier for the instance of the micro-op, and store a PEBS record in a debug storage when the instance of the micro-op is retired from the reorder buffer. The designated micro-op references a DLA of a memory accessible to the processor.

公开(公告)号：US20170242698A1

公开(公告)日：2017-08-24

申请号：US15589510

申请日：2017-05-08

Applicant: Intel Corporation

Inventor： Roger Gramunt ,  Ramon Matas ,  Benjamin C. Chaffin ,  Neal S. Moyer ,  Rammohan Padmanabhan ,  Alexey P. Suprun ,  Matthew G. Smith

IPC: G06F9/30 ,  G06F11/30 ,  G06F11/34 ,  G06F9/38 ,  G06F11/36

CPC classification number: G06F9/3016 ,  G06F9/30098 ,  G06F9/30101 ,  G06F9/30145 ,  G06F9/3855 ,  G06F9/3857 ,  G06F11/3024 ,  G06F11/34 ,  G06F11/3466 ,  G06F11/36 ,  G06F11/362 ,  G06F11/3636

Abstract: A processor includes a logic for stateless capture of data linear addresses (DLA) during precise event based sampling (PEBS) for an out-of-order execution engine. The engine may include a PEBS unit with logic to increment a counter each time an instance of a designated micro-op is retired a reorder buffer, capture output DLA referenced by an instance of the micro-op that executes after the counter overflows, set a captured bit associated with a reorder buffer identifier for the instance of the micro-op, and store a PEBS record in a debug storage when the instance of the micro-op is retired from the reorder buffer. The designated micro-op references a DLA of a memory accessible to the processor.