公开(公告)号：US09098643B2

公开(公告)日：2015-08-04

申请号：US14134166

申请日：2013-12-19

申请人： Intel Corporation

发明人： Wee Hoo Cheah ,  Chun Hung Pang ,  Kuan Loon Tan

IPC分类号： G06F13/36 ,  G06F13/40 ,  G06F1/32

CPC分类号： G06F13/4031 ,  G06F1/3253 ,  Y02D10/151

摘要： In some embodiments, a serial bus interface circuit includes at least two serial ports, a memory to store a relationship between serial bus addresses and the at least two serial ports, and a controller to control access to the at least two serial ports. The controller may be configured to receive an access request for a serial bus address, determine a first port of the at least two serial ports corresponding to the serial bus address using the relationships stored in the memory, and disable a second port of the at least two serial ports. Other embodiments are disclosed and claimed.

摘要翻译： 在一些实施例中，串行总线接口电路包括至少两个串行端口，存储器，用于存储串行总线地址与至少两个串行端口之间的关系，以及控制器，用于控制对至少两个串行端口的访问。 控制器可以被配置为接收对串行总线地址的访问请求，使用存储在存储器中的关系确定对应于串行总线地址的至少两个串行端口的第一端口，并且禁用至少第二端口 两个串口 公开和要求保护其他实施例。