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    Method, Apparatus And System For Device Transparent Grouping Of Devices On A Bus
    1.
    发明申请
    Method, Apparatus And System For Device Transparent Grouping Of Devices On A Bus 有权

    公开(公告)号：US20220214981A1

    公开(公告)日：2022-07-07

    申请号：US17705439

    申请日：2022-03-28

    Applicant: Intel Corporation

    Inventor： Kenneth P. Foust ,  Amit Kumar Srivastava ,  George Vergis

    IPC: G06F13/16 ,  G06F12/06 ,  G06F13/40 ,  G06F13/42

    Abstract: In one embodiment, a host controller includes: a first input/output (I/O) buffer to couple to a first communication line of an interconnect; a second I/O buffer to couple to a second communication line of the interconnect; and a device group selection circuit to dynamically cause the first communication line to communicate a clock signal to a first device group including one or more first devices to couple to the interconnect and dynamically cause the second communication line to communicate a data signal to the first device group when a communication is to be addressed to at least one of the one or more first devices of the first device group, such that the communication is transparent to at least another device group to couple to the interconnect. Other embodiments are described and claimed.

    Method, apparatus and system for power supply policy exchange on a bus
    2.
    发明授权
    Method, apparatus and system for power supply policy exchange on a bus 有权

    公开(公告)号：US11232060B2

    公开(公告)日：2022-01-25

    申请号：US15706902

    申请日：2017-09-18

    Applicant: Intel Corporation

    Inventor： Amit Kumar Srivastava ,  Kenneth P. Foust

    IPC: G06F13/00 ,  G06F13/42 ,  G06F1/26 ,  G06F13/38

    Abstract: In one embodiment, an apparatus includes an input/output (I/O) circuit to communicate information at a selected voltage via an interconnect to which a plurality of devices may be coupled, and a host controller to couple to the interconnect. The host controller may include a supply voltage policy control circuit to initiate a supply voltage policy exchange with a first device to obtain a first supply voltage capability of the first device and to cause the I/O circuit and the first device to be configured to communicate via the interconnect at a first supply voltage based on the first supply voltage capability. Other embodiments are described and claimed.

    Virtual Gyroscope Using Dual Magnetometers For Electronic Devices
    3.
    发明申请
    Virtual Gyroscope Using Dual Magnetometers For Electronic Devices 有权
    虚拟陀螺仪使用电子设备的双磁力计

    公开(公告)号：US20160091313A1

    公开(公告)日：2016-03-31

    申请号：US14497945

    申请日：2014-09-26

    Applicant: Intel Corporation

    Inventor： Kevin J. Daniel ,  Xianfeng Ding ,  Kenneth P. Foust ,  Eduardo X. Alban ,  Rodolfo E. Camacho-Aguilera

    IPC: G01C19/60

    CPC classification number: G01C19/60 ,  G01C17/38 ,  G01C19/00 ,  G01C25/005

    Abstract: In one example a magnetometer unit comprises logic to receive first magnetic response data from a first magnetic sensor and second magnetic response data from a second magnetic sensor displaced from the first magnetic sensor, generate a composite response surface representation from the first magnetic response data and the second magnetic response data, and store the composite response surface representation in a non-transitory memory. Other examples may be described.

    Abstract translation: 在一个示例中，磁力计单元包括从第一磁传感器接收第一磁响应数据和从第一磁传感器移位的第二磁传感器的第二磁响应数据的逻辑，从第一磁响应数据生成复合响应面表示， 第二磁响应数据，并将复合响应表面表示存储在非瞬时存储器中。 可以描述其他示例。

    Method, Apparatus And System For Device Transparent Grouping Of Devices On A Bus
    6.
    发明申请
    Method, Apparatus And System For Device Transparent Grouping Of Devices On A Bus 审中-公开

    公开(公告)号：US20190042495A1

    公开(公告)日：2019-02-07

    申请号：US15898909

    申请日：2018-02-19

    Applicant: Intel Corporation

    Inventor： Kenneth P. Foust ,  Amit Kumar Srivastava ,  George Vergis

    IPC: G06F13/16 ,  G06F13/40 ,  G06F12/06

    Abstract: In one embodiment, a host controller includes: a first input/output (I/O) buffer to couple to a first communication line of an interconnect; a second I/O buffer to couple to a second communication line of the interconnect; and a device group selection circuit to dynamically cause the first communication line to communicate a clock signal to a first device group including one or more first devices to couple to the interconnect and dynamically cause the second communication line to communicate a data signal to the first device group when a communication is to be addressed to at least one of the one or more first devices of the first device group, such that the communication is transparent to at least another device group to couple to the interconnect. Other embodiments are described and claimed.

    Out-of-band interrupt mapping in MIPI improved inter-integrated circuit communication
    10.
    发明授权
    Out-of-band interrupt mapping in MIPI improved inter-integrated circuit communication 有权

    公开(公告)号：US11226912B2

    公开(公告)日：2022-01-18

    申请号：US17011877

    申请日：2020-09-03

    Applicant: Intel Corporation

    Inventor： Kenneth P. Foust ,  Duane G. Quiet ,  Amit Kumar Srivastava

    IPC: G06F13/24 ,  G06F13/42

    Abstract: Embodiments of the present disclosure may relate to a host controller that includes processing circuitry to identify an inter-integrated circuit (I2C) out-of-band interrupt (OBI) received on a general purpose input-output (GPIO) pin from an I2C device that is unable to generate an improved inter-integrated circuit (I3C) bus an I3C in-band interrupt (IBI). The processing circuitry may further generate, based on the I2C OBI, an I3C IBI that includes information related to the I2C OBI. The host controller may further include transmission circuitry to transmit the I3C IBI on an I3C bus. Other embodiments may be described and/or claimed.

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