公开(公告)号：US20240176592A1

公开(公告)日：2024-05-30

申请号：US18431803

申请日：2024-02-02

申请人： Intel Corporation

发明人： Hong Shan Neoh

IPC分类号： G06F7/78

CPC分类号： G06F7/78

摘要： A circuit system includes a memory block and first and second processing circuits. The first and second processing circuits store a matrix in the memory block by concurrently writing first and second rows or columns of the matrix to first and second regions of storage in the memory block, respectively. The first and second processing circuits transpose the matrix to generate a transposed matrix by concurrently reading first and second rows or columns of the transposed matrix from third and fourth regions of storage in the memory block, respectively.

公开(公告)号：US11928443B2

公开(公告)日：2024-03-12

申请号：US16721458

申请日：2019-12-19

申请人： Intel Corporation

发明人： Hong Shan Neoh

IPC分类号： G06F7/78

CPC分类号： G06F7/78

摘要： A circuit system includes a memory block and first and second processing circuits. The first and second processing circuits store a matrix in the memory block by concurrently writing elements in first and second rows or columns of the matrix to first and second regions of storage in the memory block, respectively. The first and second processing circuits transpose the matrix to generate a transposed matrix by concurrently reading elements in first and second rows or columns of the transposed matrix from third and fourth regions of storage in the memory block, respectively.