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公开(公告)号：US20240134602A1
公开(公告)日：2024-04-25
申请号：US18240618
申请日：2023-08-31
发明人： Max Freiburghaus , William Wheeler , Daniel Ley
IPC分类号： G06F7/487
CPC分类号： G06F7/4876
摘要： Methods of squaring, in hardware logic, a floating point number comprising an m-bit input exponent and an input mantissa comprise generating a candidate mantissa output, in mantissa hardware logic, by squaring the input mantissa and generating, in exponent and exception logic, three candidate exponent outputs. The three candidate exponent outputs comprise (i) an exceptional exponent output, (ii) an exponent output generated from the m-bit input exponent and (iii) an incremental exponent generated by incrementing the exponent output. The method further comprises selecting, as the output mantissa, either the candidate mantissa output or an exceptional mantissa output based on exception signals generated by the exponent and exception logic based on the m-bit input exponent. The method additionally comprises selecting, as an output exponent, one of the three candidate exponent outputs based on the exception signals and based on a signal indicating a mantissa overflow condition.
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公开(公告)号：US20240134607A1
公开(公告)日：2024-04-25
申请号：US18240387
申请日：2023-08-31
发明人： Max Freiburghaus , William Wheeler , Daniel Ley
CPC分类号： G06F7/5525 , G06F7/405
摘要： Methods of calculating a square of an input number in hardware logic are described. An m-bit number is received and Booth encoding is performed on different groups of three consecutive bits selected from the input to generate an encoded value for each of the groups. For each group, the method comprises forming a truncated string from the input number, generating an updated version of the truncated number and selecting a bit string based on the encoded value, the selected bit string comprising zeros or a left-shifted version of the updated version of the truncated number sign extended to a bit-width of 2m bits. The method further comprises combining the selected bit strings and square and sign bits for each group into an addition array; and summing the bits in the addition array.
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