公开(公告)号：US11604889B2

公开(公告)日：2023-03-14

申请号：US15777721

申请日：2015-12-22

申请人： Intel Corporation

发明人： Ajith K. Illendula ,  Kshitij A. Doshi ,  Vincent J. Zimmer

IPC分类号： H04L29/06 ,  G06F21/62 ,  G06F16/27 ,  G06F16/23 ,  G06F16/11 ,  H04L9/40

摘要： Systems, apparatuses and methods may provide for a memory apparatus that includes a client-side address space dedicated to an accessor of obfuscated multi-tenant data, wherein an executable view generation library is stored to the client-side address space. In one example, the executable view generation library is to receive a request to access at least a portion of the obfuscated multi-tenant data, convert the obfuscated multi-tenant data to deobfuscated multi-tenant data based on metadata associated with the executable view generation library and generate a single-tenant view based on the deobfuscated multi-tenant data.

公开(公告)号：US20210039781A1

公开(公告)日：2021-02-11

申请号：US17040601

申请日：2018-05-21

申请人： Intel Corporation

发明人： Jiewen Jacques Yao ,  Vincent J. Zimmer ,  Rajesh Poornachandran

IPC分类号： B64C39/02 ,  G05D1/10

摘要： Disclosed herein is a charging drone. The charging drone can comprise a flight mechanism, a charging transmitter, a processor, and a memory. The processor can be in electrical communication with the flight mechanism and the charging transmitter. The memory can store instructions that, when executed by the processor, can cause the processor to perform operations. The operations can comprise receiving a charge request signal; transmitting a navigation signal to the flight mechanism; verifying credentials from an in-flight drone; and activing the charging transmitter. The charge request signal can include data associated with the in-flight drone. The navigation signal can include guidance data for guiding the charging drone to the in-flight drone. The credentials can be verified when the charging drone is proximate the in-flight drone. The charging transmitter can be activated upon verification of the credentials.

公开(公告)号：US10831934B2

公开(公告)日：2020-11-10

申请号：US15709047

申请日：2017-09-19

申请人： Intel Corporation

发明人： Vincent J. Zimmer ,  Nicholas J. Adams ,  Giri P. Mudusuru ,  Lee G. Rosenbaum ,  Michael A. Rothman

IPC分类号： G06F21/57 ,  G06F21/72 ,  G09C1/00 ,  H04L9/32

摘要： An embodiment includes an apparatus comprising: an out-of-band cryptoprocessor coupled to secure non-volatile storage; and at least one storage medium having firmware instructions stored thereon for causing, during runtime and after an operating system for the apparatus has booted, the cryptoprocessor to (a) store a key within the secure non-volatile storage, (b) sign an object with the key, while the key is within the cryptoprocessor, to produce a signature, and (c) verify the signature. Other embodiments are described herein.

公开(公告)号：US10776283B2

公开(公告)日：2020-09-15

申请号：US15089235

申请日：2016-04-01

申请人： INTEL CORPORATION

发明人： Kirk D. Brannock ,  Barry E. Huntley ,  Vincent J. Zimmer

IPC分类号： G06F12/14 ,  G06F13/24 ,  G06F12/1009

摘要： Various embodiments are generally directed to an apparatus, method and other techniques for allocating a portion of the memory as system management random access memory (SMRAM) including a system management interrupt (SMI) handler for a system management mode (SMM), the SMI handler to handle SMIs for the SMM, generating a page table for the SMM, the page table comprising one or more mapped pages to map virtual addresses to physical addresses for the SMM, and setting one or more page table attributes for the page table to prevent a malicious code attack on the SMM.

公开(公告)号：US10762216B2

公开(公告)日：2020-09-01

申请号：US15789607

申请日：2017-10-20

申请人： INTEL CORPORATION

发明人： Qian Ouyang ,  Jian J. Wang ,  Vincent J. Zimmer ,  Michael A. Rothman ,  Chao B. Zhang

IPC分类号： G06F12/14 ,  G06F21/60 ,  G06F21/32 ,  G06F21/57 ,  G06F9/4401

摘要： Methods, systems and storage media are disclosed for enhanced system boot processing that authenticates boot code based on biometric information of the user before loading the boot code to system memory. For at least some embodiments, the bio-metric authentication augments authentication of boot code based on a unique platform identifier. The enhanced boot code authentication occurs before loading of the operating system, and may be performed during a Unified Extensible Firmware Interface (UEFI) boot sequence. Other embodiments are described and claimed.

公开(公告)号：US10540193B2

公开(公告)日：2020-01-21

申请号：US15590781

申请日：2017-05-09

申请人： INTEL CORPORATION

发明人： Mingqiu Sun ,  Noah Zentzis ,  Vincent J. Zimmer ,  Peggy J. Irelan ,  Timothy E. Abels ,  Gopinatth Selvaraje ,  Rajesh Poornachandran

IPC分类号： G06F9/455 ,  G06F16/28 ,  G06F12/14

摘要： A microservice infrastructure that securely maintains the currency of computing platform microservices implemented within a process virtual machine is provided. The computing platform microservices maintained by the infrastructure may include protected methods that provide and control access to components of the underlying computing environment. These components may include, for example, storage devices, peripherals, and network interfaces. By providing a software-defined microservice layer between these hardware components and workflows that specify high-level application logic, the embodiments disclosed herein have enhanced flexibility and scalability when compared to conventional technology.

公开(公告)号：US10394295B2

公开(公告)日：2019-08-27

申请号：US15598032

申请日：2017-05-17

申请人： Intel Corporation

发明人： Michael A. Rothman ,  Vincent J. Zimmer ,  Jiewen Yao

IPC分类号： G06F1/24 ,  G06F9/44 ,  G06F9/455 ,  G06F1/32 ,  G06F21/57 ,  H04L9/08 ,  G06F9/4401 ,  G06F1/3206 ,  G06F9/445

摘要： Apparatuses, methods and storage medium associated with streamlined physical reset are described herein. In embodiments, an apparatus for computing, including streamlined physical reset, may comprise one or more processor cores; memory having a plurality of memory locations; and a basic input/output system (BIOS) to provide basic input/output system services, wherein the BIOS stays within a range of memory locations during each initialization of the BIOS, including an initialization of the BIOS that is part of a physical reset of the apparatus, to streamline the physical reset. Other embodiments may be described and/or claimed.

公开(公告)号：US10389788B2

公开(公告)日：2019-08-20

申请号：US14583668

申请日：2014-12-27

申请人： Intel Corporation

发明人： Rajesh Poornachandran ,  Ned M. Smith ,  Michael D. Rosenzweig ,  Vincent J. Zimmer ,  Qixiong J. Bian

IPC分类号： G06F15/16 ,  H04L29/06

摘要： Technologies for adaptive real-time media streaming include a computing device to determine, by a trusted execution environment of the computing device, a current workload of the computing device based on at least one activity counter. The at least one activity counter is to record counter data associated with performance of the computing device. Further, the computing device determines a residual workload capable of being supported by the computing device based on the determined current workload and a new content playback characteristics for streaming media content based on the determined residual workload. The computing device streams media content received from a trusted server based on the determined new content playback characteristics.

公开(公告)号：US20190243620A1

公开(公告)日：2019-08-08

申请号：US16232372

申请日：2018-12-26

申请人： INTEL CORPORATION

发明人： Mingqiu SUN ,  Rajesh Poornachandran ,  Vincent J. Zimmer ,  Ned M. Smith ,  Gopinatth Selvaraje

IPC分类号： G06F8/41 ,  G06F21/62 ,  G06F21/53 ,  G06F9/50 ,  G06F9/455 ,  G06F21/00 ,  G06F21/57

CPC分类号： G06F8/41 ,  G06F9/455 ,  G06F9/45516 ,  G06F9/45533 ,  G06F9/5044 ,  G06F21/00 ,  G06F21/53 ,  G06F21/57 ,  G06F21/6281

摘要： Various embodiments are generally directed to techniques for supporting the distributed execution of a task routine among multiple secure controllers incorporated into multiple computing devices. An apparatus includes a first processor component and first secure controller of a first computing device, where the first secure controller includes: a selection component to select the first secure controller or a second secure controller of a second computing device to compile a task routine based on a comparison of required resources to compile the task routine and available resources of the first secure controller; and a compiling component to compile the task routine into a first version of compiled routine for execution within the first secure controller by the first processor component and a second version for execution within the second secure controller by a second processor component in response to selection of the first secure controller. Other embodiments are described and claimed.

公开(公告)号：US10366237B2

公开(公告)日：2019-07-30

申请号：US15421539

申请日：2017-02-01

申请人： Intel Corporation

发明人： Vincent J. Zimmer ,  Peter J. Barry ,  Rajesh Poornachandran ,  Arjan Van De Ven ,  Peter A. Dice ,  Gopinatth Selvaraje ,  Julien Carreno ,  Lee G. Rosenbaum

IPC分类号： G06F21/57 ,  G06F21/53 ,  G06F9/44 ,  H04L9/08 ,  H04L9/14 ,  H04L9/30 ,  G06F21/72 ,  G06F21/79 ,  G06F9/4401

摘要： In an embodiment, a system on a chip includes: a single core to execute a legacy instruction set, the single core configured to enter a system management mode (SMM) to provide a trusted execution environment to perform at least one secure operation; and a memory controller coupled to the single core, the memory controller to interface with a system memory, where a portion of the system memory comprises a secure memory for the SMM, and the single core is to authenticate and execute a boot firmware, and pass control to the SMM to obtain a key pair from a protected storage and store the key pair in the secure memory. Other embodiments are described and claimed.