公开(公告)号：US11522051B2

公开(公告)日：2022-12-06

申请号：US17537726

申请日：2021-11-30

Applicant: IDEAL POWER INC.

Inventor： Alireza Mojab ,  Daniel Brdar ,  Ruiyang Yu

IPC: H01L29/10 ,  H03K17/082 ,  H01L29/747 ,  H01L29/732

Abstract: Operating a bi-directional double-base bipolar junction transistor (B-TRAN). One example is a method comprising: conducting a first load current from an upper terminal of the power module to an upper collector-emitter of the transistor, through the transistor, and from a lower collector-emitter to a lower terminal of the power module; and then responsive assertion of a first interrupt signal, interrupting the first load current from the lower collector-emitter to the lower terminal by opening a lower-main FET and thereby commutating a first shutoff current through a lower base of the transistor to the lower terminal; and blocking current from the upper terminal to the lower terminal by the transistor.

公开(公告)号：US11888030B2

公开(公告)日：2024-01-30

申请号：US18053839

申请日：2022-11-09

Applicant: IDEAL POWER INC.

Inventor： John Wood ,  Alireza Mojab ,  Daniel Brdar ,  Ruiyang Yu

IPC: H01L29/10 ,  H03K17/082 ,  H01L29/747 ,  H01L29/732

CPC classification number: H01L29/1004 ,  H01L29/732 ,  H01L29/747 ,  H03K17/0826

Abstract: Operating a bi-directional double-base bipolar junction transistor (B-TRAN). One example is a method comprising: conducting a first load current from an upper terminal of the power module to an upper-main lead of the transistor, through the transistor, and from a lower-main lead of the transistor to a lower terminal of the power module; and then responsive assertion of a first interrupt signal, interrupting the first load current from the lower-main lead to the lower terminal by opening a lower-main FET and commutating a first shutoff current through a lower-control lead the transistor to the lower terminal; and blocking current from the upper terminal to the lower terminal by the transistor.