公开(公告)号：US12174254B2

公开(公告)日：2024-12-24

申请号：US18308405

申请日：2023-04-27

Applicant: Huawei Technologies Co., Ltd.

Inventor： Zhe Tao ,  Ge Shen ,  Jianlong Cao ,  Ming Wang ,  Rui Fang

IPC: G01R31/3185 ,  G06F9/48

Abstract: A fault detection method includes: obtaining a scheduling table of a target task, where the scheduling table is used to indicate at least one test pattern, the at least one test pattern is used to detect a fault in a target logic circuit, and the target logic circuit is a logic circuit configured to execute the target task; and executing the at least one test pattern based on the scheduling table, to detect the fault in the target logic circuit.

公开(公告)号：US20230146364A1

公开(公告)日：2023-05-11

申请号：US18148954

申请日：2022-12-30

Applicant: HUAWEI TECHNOLOGIES CO., LTD.

Inventor： Aiguo Cui ,  Zhe Tao ,  Liang Deng ,  Qiangdong Wang ,  Zhongping Tan ,  Jianlong Cao

IPC: G06F9/455

CPC classification number: G06F9/45558 ,  G06F2009/4557 ,  G06F2009/45587 ,  G06F2009/45583

Abstract: A process running method and apparatus are provided. The method includes: receiving a process startup request; executing an executable file of a target process in a kernel based on the process startup request, to obtain first running function data that supports running of the target process in the kernel; migrating the first running function data to a functional safety partition to obtain second running function data, where the functional safety partition and the kernel are located at a same privilege layer; and running the target process in the functional safety partition based on the second running function data. According to the present disclosure, both the functional safety partition and the kernel are located at a kernel layer. In this way, during process running, a service at the kernel layer can be called without switching from a user layer to the kernel layer.

公开(公告)号：US20230258718A1

公开(公告)日：2023-08-17

申请号：US18308405

申请日：2023-04-27

Applicant: Huawei Technologies Co., Ltd.

Inventor： Zhe Tao ,  Ge Shen ,  Jianlong Cao ,  Ming Wang ,  Rui Fang

IPC: G01R31/3185 ,  G06F9/48

CPC classification number: G01R31/318544 ,  G06F9/4881

Abstract: Embodiments of this application disclose a fault detection method, and relate to the field of computer technologies. The method according to embodiments of this application includes: obtaining a scheduling table of a target task, where the scheduling table is used to indicate at least one test pattern, the at least one test pattern is used to detect a fault in a target logic circuit, and the target logic circuit is a logic circuit configured to execute the target task; and executing the at least one test pattern based on the scheduling table, to detect the fault in the target logic circuit. By determining the scheduling table of the target task, the test pattern included in the scheduling table is executed, so that execution of all test patterns in a software test library can be avoided. This reduces load of a processor, and effectively improves working efficiency of the processor.