公开(公告)号：US20180139039A1

公开(公告)日：2018-05-17

申请号：US15812651

申请日：2017-11-14

Applicant: Huawei Technologies Co., Ltd.

Inventor： Tao Liu ,  Yu Liu ,  Feifei Yin

IPC: H04L9/00 ,  G06F12/14 ,  H04L9/06 ,  H04L9/08

CPC classification number: H04L9/004 ,  G06F12/1408 ,  G06F21/00 ,  G06F2212/1052 ,  G09C1/00 ,  H04L9/0618 ,  H04L9/0869 ,  H04L9/0894

Abstract: A data processing method and apparatus relate to the field of communications technologies and applicable to data processing used to resolve a low security problem of data stored in a memory. A memory encryption/decryption (MED) apparatus receives a data write command, encrypts to-be-written data, scrambles an address to which data is to be written, and then saves a cyclic redundancy check (CRC) code of the to-be-written data and encrypted to-be-written data in a memory according to a scrambled address to which data is to be written. Solutions provided in the embodiments of the present disclosure are.

公开(公告)号：US10659216B2

公开(公告)日：2020-05-19

申请号：US15812651

申请日：2017-11-14

Applicant: Huawei Technologies Co., Ltd.

Inventor： Tao Liu ,  Yu Liu ,  Feifei Yin

IPC: G06F21/00 ,  H04L9/00 ,  H04L9/08 ,  G09C1/00 ,  G06F12/14 ,  H04L9/06

Abstract: A data processing method and apparatus relate to the field of communications technologies and applicable to data processing used to resolve a low security problem of data stored in a memory. A memory encryption/decryption (MED) apparatus receives a data write command, encrypts to-be-written data, scrambles an address to which data is to be written, and then saves a cyclic redundancy check (CRC) code of the to-be-written data and encrypted to-be-written data in a memory according to a scrambled address to which data is to be written. Solutions provided in the embodiments of the present disclosure are.

公开(公告)号：US11436376B2

公开(公告)日：2022-09-06

申请号：US16412932

申请日：2019-05-15

Applicant: HUAWEI TECHNOLOGIES CO., LTD.

Inventor： Feifei Yin ,  Yu Liu ,  Jiayin Lu

IPC: G06F21/75 ,  G06F21/60 ,  G06F21/72 ,  G06F21/71 ,  G06F21/81

Abstract: The present application provides example terminal chips. One example terminal chip includes a security element, an application processor, and an interface module configured to transfer information between the application processor and the security element. The terminal chip includes a first power interface configured to receive power outside the terminal chip. A first power input port of the security element is connected to the first power interface, and at least one of the application processor or the interface module is connected to the first power interface. In the example terminal chip, a power supply port of the security element is connected to a power supply port of the application processor or the interface module of the terminal chip.

公开(公告)号：US10901029B2

公开(公告)日：2021-01-26

申请号：US15812640

申请日：2017-11-14

Applicant: Huawei Technologies Co., Ltd.

Inventor： Feifei Yin ,  Yu Liu ,  Jiayin Lu ,  ZhuFeng Tan

IPC: G06F3/06 ,  G01R31/28 ,  G11C17/16 ,  G11C17/18 ,  G11C16/22 ,  G11C7/24 ,  H01L23/538 ,  H01L23/00

Abstract: A chip, including a selector, a one-time programmable (OTP) device, and a controller, where the controller is separately coupled to a selection end of the selector and the OTP device, and the controller is configured to detect a device value of the OTP device, and provide a first selection signal when the device value of the OTP device is within a first preset range. A first input end of the selector is configured to receive access data, a second input end of the selector is configured to receive a preset invalid value, and an output end of the selector is coupled to the OTP device. The selector is configured to control the data received by the second input end to be output from the output end of the selector when the first selection signal is input.

公开(公告)号：US20180136274A1

公开(公告)日：2018-05-17

申请号：US15812640

申请日：2017-11-14

Applicant: Huawei Technologies Co., Ltd.

Inventor： Feifei Yin ,  Yu Liu ,  Jiayin Lu ,  ZhuFeng Tan

IPC: G01R31/28 ,  H01L23/538 ,  H01L23/00

CPC classification number: G01R31/2856 ,  G01R31/2863 ,  G11C7/24 ,  G11C16/22 ,  G11C17/16 ,  G11C17/18 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/82

Abstract: A chip, including a selector, a one-time programmable (OTP) device, and a controller, where the controller is separately coupled to a selection end of the selector and the OTP device, and the controller is configured to detect a device value of the OTP device, and provide a first selection signal when the device value of the OTP device is within a first preset range. A first input end of the selector is configured to receive access data, a second input end of the selector is configured to receive a preset invalid value, and an output end of the selector is coupled to the OTP device. The selector is configured to control the data received by the second input end to be output from the output end of the selector when the first selection signal is input.