公开(公告)号：US20090269902A1

公开(公告)日：2009-10-29

申请号：US12499248

申请日：2009-07-08

申请人： Ho Jin CHO ,  Cheol Hwan PARK ,  Jae Soo KIM ,  Dong Kyun LEE

发明人： Ho Jin CHO ,  Cheol Hwan PARK ,  Jae Soo KIM ,  Dong Kyun LEE

IPC分类号： H01L21/02

CPC分类号： H01L28/65 ,  H01L27/10852 ,  H01L28/91

摘要： A capacitor is made by forming a buffer oxide layer, an etching stop layer, and a mold insulation layer over a semiconductor substrate having a storage node contact plug. The mold insulation layer and the etching stop layer are etched to form a hole in an upper portion of the storage node contact plug. A tapering layer is deposited over the mold insulation layer including the hole. The tapering layer and the buffer oxide layer are etched back so that the tapering layer is remained only at the upper end portion of the etched hole. A metal storage node layer formed on the etched hole over the remaining tapering layer. The mold insulation layer and the remaining tapering layer are removed to form a cylindrical storage node having a tapered upper end. A dielectric layer and a plate node are formed over the storage node.

摘要翻译： 通过在具有存储节点接触插塞的半导体衬底上形成缓冲氧化物层，蚀刻停止层和模具绝缘层来制造电容器。 蚀刻模具绝缘层和蚀刻停止层，以在存储节点接触插塞的上部形成孔。 在包括孔的模具绝缘层上沉积渐缩层。 锥形层和缓冲氧化物层被回蚀刻，使得锥形层仅保留在蚀刻孔的上端部。 在剩余的锥形层上形成在蚀刻孔上的金属储存节点层。 去除模具绝缘层和剩余的锥形层以形成具有锥形上端的圆柱形存储节点。 在存储节点上形成介电层和板状节点。

公开(公告)号：US20090275186A1

公开(公告)日：2009-11-05

申请号：US12265759

申请日：2008-11-06

申请人： Cheol Hwan PARK ,  Ho Jin CHO ,  Jae Soo KIM ,  Dong Kyun LEE

发明人： Cheol Hwan PARK ,  Ho Jin CHO ,  Jae Soo KIM ,  Dong Kyun LEE

IPC分类号： H01L21/02

CPC分类号： H01L28/91

摘要： Forming a capacitor of a semiconductor device includes forming an interlayer dielectric having holes over a semiconductor substrate. A conductive layer is then formed on surfaces of the holes and on the upper surface of the interlayer dielectric. A silicon-containing conductive layer is formed by flowing a silicon source gas for the semiconductor substrate formed with the conductive layer, so that silicon atoms can penetrate into the conductive layer. The silicon-containing conductive layer prevents etchant from infiltrating the interlayer dielectric below the silicon-containing conductive layer.

摘要翻译： 形成半导体器件的电容器包括在半导体衬底上形成具有孔的层间电介质。 然后在孔的表面和层间电介质的上表面上形成导电层。 通过使形成有导电层的半导体衬底的硅源气体流动而形成含硅导电层，使得硅原子能够渗透到导电层中。 含硅导电层防止蚀刻剂渗透到含硅导电层之下的层间电介质。

公开(公告)号：US20080157093A1

公开(公告)日：2008-07-03

申请号：US11779093

申请日：2007-07-17

申请人： Ho Jin CHO ,  Cheol Hwan PARK ,  Jae Soo KIM ,  Dong Kyun LEE

发明人： Ho Jin CHO ,  Cheol Hwan PARK ,  Jae Soo KIM ,  Dong Kyun LEE

IPC分类号： H01L29/12 ,  H01L21/20

CPC分类号： H01L28/65 ,  H01L27/10852 ,  H01L28/91

摘要： A capacitor is made by forming a buffer oxide layer, an etching stop layer, and a mold insulation layer over a semiconductor substrate having a storage node contact plug. The mold insulation layer and the etching stop layer are etched to form a hole in an upper portion of the storage node contact plug. A tapering layer is deposited over the mold insulation layer including the hole. The tapering layer and the buffer oxide layer are etched back so that the tapering layer is remained only at the upper end portion of the etched hole. A metal storage node layer formed on the etched hole over the remaining tapering layer. The mold insulation layer and the remaining tapering layer are removed to form a cylindrical storage node having a tapered upper end. A dielectric layer and a plate node are formed over the storage node.

摘要翻译： 通过在具有存储节点接触插塞的半导体衬底上形成缓冲氧化物层，蚀刻停止层和模具绝缘层来制造电容器。 蚀刻模具绝缘层和蚀刻停止层，以在存储节点接触插塞的上部形成孔。 在包括孔的模具绝缘层上沉积渐缩层。 锥形层和缓冲氧化物层被回蚀刻，使得锥形层仅保留在蚀刻孔的上端部。 在剩余的锥形层上形成在蚀刻孔上的金属储存节点层。 去除模具绝缘层和剩余的锥形层以形成具有锥形上端的圆柱形存储节点。 在存储节点上形成介电层和板状节点。

公开(公告)号：US20100327410A1

公开(公告)日：2010-12-30

申请号：US12649610

申请日：2009-12-30

申请人： Cheol Hwan PARK ,  Ho Jin CHO ,  Dong Kyun LEE

发明人： Cheol Hwan PARK ,  Ho Jin CHO ,  Dong Kyun LEE

IPC分类号： H01L29/92 ,  H01L21/02

CPC分类号： H01L28/91 ,  H01L27/10817 ,  H01L27/10852 ,  H01L27/10894

摘要： A semiconductor device having a high aspect cylindrical capacitor and a method for fabricating the same is presented. The high aspect cylindrical type capacitor is a stable structure which is not prone to causing bunker defects and losses in a guard ring. The semiconductor device includes the cylindrical type capacitor structure, a storage node oxide, a guard ring hole, a conductive layer, and a capping oxide. The cylindrical type capacitor structure in a cell region includes a cylindrical type lower electrode, a dielectric and an upper electrode. The storage node oxide is in a peripheral region over the semiconductor substrate. The conductive layer coating the guard ring hole. The guard ring hole at a boundary of the peripheral region that adjoins the cell region over the semiconductor substrate. The capping oxide partially fills in a part of the conductive layer. The gapfill film filling in the rest of the conductive layer.

摘要翻译： 提出了具有高方位圆柱形电容器的半导体器件及其制造方法。 高档圆柱型电容器是一种稳定的结构，不容易造成保护环中的掩体缺陷和损失。 半导体器件包括圆柱形电容器结构，存储节点氧化物，保护环孔，导电层和封盖氧化物。 单元区域中的圆柱型电容器结构包括圆筒形下电极，电介质和上电极。 存储节点氧化物位于半导体衬底上的周边区域中。 导电层涂覆保护环孔。 在与半导体基板上的单元区域相邻的周边区域的边界处的保护环孔。 覆盖氧化物部分地填充导电层的一部分。 间隙填充膜填充在导电层的其余部分。

公开(公告)号：US20110024874A1

公开(公告)日：2011-02-03

申请号：US12647621

申请日：2009-12-28

申请人： Cheol Hwan PARK ,  Ho Jin CHO ,  Dong Kyun LEE

发明人： Cheol Hwan PARK ,  Ho Jin CHO ,  Dong Kyun LEE

IPC分类号： H01L29/92 ,  H01L21/02

CPC分类号： H01L28/91 ,  H01L27/10852

摘要： A semiconductor device having a three-dimensional capacitor and a method for manufacturing the same is presented. The semiconductor device may have lower electrodes, a buffer layer, a dielectric layer, and an upper electrode. The lower electrodes are formed over a semiconductor substrate. The buffer layer is formed on sidewalls of the lower electrodes. The dielectric layer and an upper electrode are formed over semiconductor substrate including over the lower electrodes and the buffer layer. Accordingly, sufficient space between the lower electrodes can be secured. Furthermore, the lower electrodes can be each formed of a ruthenium layer and a titanium nitride layer and configured to have a pillar form. The dielectric layer may be composed of titanium dioxide.

摘要翻译： 本发明提供一种具有三维电容器的半导体器件及其制造方法。 半导体器件可以具有下电极，缓冲层，电介质层和上电极。 下电极形成在半导体衬底上。 缓冲层形成在下电极的侧壁上。 电介质层和上电极形成在包括在下电极和缓冲层之上的半导体衬底之上。 因此，可以确保下部电极之间的足够的空间。 此外，下电极可以由钌层和氮化钛层形成，并且被构造成具有柱状。 电介质层可以由二氧化钛构成。

公开(公告)号：US20120019980A1

公开(公告)日：2012-01-26

申请号：US12979926

申请日：2010-12-28

申请人： Ho Jin CHO ,  Cheol Hwan PARK ,  Dong Kyun LEE

发明人： Ho Jin CHO ,  Cheol Hwan PARK ,  Dong Kyun LEE

IPC分类号： H01G4/06 ,  H01L21/02

CPC分类号： H01L27/10894 ,  H01L27/10852 ,  H01L27/10855 ,  H01L28/90

摘要： An embodiment of the invention includes a pillar type capacitor where a pillar is formed over an upper portion of a storage node contact. A bottom electrode is formed over sidewalls of the pillar, and a dielectric film is formed over pillar and the bottom electrode. A top electrode is then formed over the upper portion of the dielectric film.

摘要翻译： 本发明的实施例包括柱形电容器，其中柱形成在存储节点接触件的上部上。 底部电极形成在支柱的侧壁上，电介质膜形成在支柱和底部电极之上。 然后在电介质膜的上部上形成顶部电极。

公开(公告)号：US20110272784A1

公开(公告)日：2011-11-10

申请号：US13185873

申请日：2011-07-19

申请人： Cheol Hwan PARK ,  Ho Jin CHO ,  Dong Kyun LEE

发明人： Cheol Hwan PARK ,  Ho Jin CHO ,  Dong Kyun LEE

IPC分类号： H01L29/92

CPC分类号： H01L28/91 ,  H01L27/10817 ,  H01L27/10852 ,  H01L27/10894

摘要： A semiconductor device having a high aspect cylindrical capacitor and a method for fabricating the same is presented. The high aspect cylindrical type capacitor is a stable structure which is not prone to causing bunker defects and losses in a guard ring. The semiconductor device includes the cylindrical type capacitor structure, a storage node oxide, a guard ring hole, a conducive layer, and a capping oxide. The cylindrical type capacitor structure in a cell region includes a cylindrical type lower electrode, a dielectric and an upper electrode. The storage node oxide is in a peripheral region over the semiconductor substrate. The conductive layer coating the guard ring hole. The guard ring hole at a boundary of the peripheral region that adjoins the cell region over the semiconductor substrate. The capping oxide partially fills in a part of the conductive layer. The gapfill film filling in the rest of the conductive layer.

摘要翻译： 提出了具有高方位圆柱形电容器的半导体器件及其制造方法。 高档圆柱型电容器是一种稳定的结构，不容易造成保护环中的掩体缺陷和损失。 半导体器件包括圆柱形电容器结构，存储节点氧化物，保护环孔，导电层和封盖氧化物。 单元区域中的圆柱型电容器结构包括圆筒形下电极，电介质和上电极。 存储节点氧化物位于半导体衬底上的周边区域中。 导电层涂覆保护环孔。 在与半导体基板上的单元区域相邻的周边区域的边界处的保护环孔。 覆盖氧化物部分地填充导电层的一部分。 间隙填充膜填充在导电层的其余部分。

公开(公告)号：US20090246950A1

公开(公告)日：2009-10-01

申请号：US12275332

申请日：2008-11-21

申请人： Jae Soo KIM ,  Cheol Hwan PARK ,  Ho Jin CHO

发明人： Jae Soo KIM ,  Cheol Hwan PARK ,  Ho Jin CHO

IPC分类号： H01L21/28

CPC分类号： H01L21/268 ,  H01L27/10876 ,  H01L29/4236 ,  H01L29/66621

摘要： A laser annealing method for manufacturing a semiconductor device is presented. The method includes at least two forming steps and one annealing step. The first forming steps includes forming gates on a semiconductor substrate. The second forming step includes forming an insulation layer on the semiconductor substrate and on the gates. The annealing step includes annealing the insulation layer using electromagnetic radiation emitted from a laser.

摘要翻译： 提出了一种用于制造半导体器件的激光退火方法。 该方法包括至少两个形成步骤和一个退火步骤。 第一形成步骤包括在半导体衬底上形成栅极。 第二形成步骤包括在半导体衬底上和栅极上形成绝缘层。 退火步骤包括使用从激光发射的电磁辐射对绝缘层进行退火。

公开(公告)号：US20090206448A1

公开(公告)日：2009-08-20

申请号：US12244115

申请日：2008-10-02

申请人： Ho Jin CHO ,  Cheol Hwan PARK ,  Jae Wook SEO ,  Jong Kuk KIM

发明人： Ho Jin CHO ,  Cheol Hwan PARK ,  Jae Wook SEO ,  Jong Kuk KIM

IPC分类号： H01L29/00 ,  H01L21/00

CPC分类号： H01L28/91 ,  H01L27/10852

摘要： A semiconductor device that prevents the leaning of storage node when forming a capacitor having high capacitance includes a plurality of cylinder-shaped storage nodes formed over a semiconductor substrate; and support patterns formed to fix the storage nodes in the form of an ‘L’ or a ‘+’ when viewed from the top. This semiconductor device having support patterns in the form of an ‘L’ or a ‘+’ reduces stress on the storage nodes when subsequently forming a dielectric layer and plate nodes that prevents the capacitors from leaking.

摘要翻译： 当形成具有高电容的电容器时，防止存储节点倾斜的半导体器件包括形成在半导体衬底上的多个圆柱形存储节点; 以及当从顶部观察时，形成为以“L”或“+”的形式固定存储节点的支撑图案。 具有“L”或“+”形式的支撑图案的这种半导体器件随后形成介电层并且防止电容器泄漏的板节点减小了存储节点上的应力。

公开(公告)号：US20130016239A1

公开(公告)日：2013-01-17

申请号：US13415285

申请日：2012-03-08

申请人： Jung Uk CHO ,  Seung Yong LEE ,  Sung Hyun CHO ,  Shi Hwa LEE ,  Young Su MOON ,  Ho Jin CHO

发明人： Jung Uk CHO ,  Seung Yong LEE ,  Sung Hyun CHO ,  Shi Hwa LEE ,  Young Su MOON ,  Ho Jin CHO

IPC分类号： H04N5/228 ,  G06K9/40

CPC分类号： H04N5/23277

摘要： A method and apparatus for removing a non-uniform motion blur using a multi-frame may estimate non-uniform motion blur information using a multi-frame including a non-uniform motion blur, and may remove the non-uniform motion blur using the estimated non-uniform motion blur and the multi-frame. The apparatus may also obtain more accurate non-uniform motion blur information by iteratively performing the estimation of the non-uniform motion blur information, and the removal of the non-uniform motion blur.

摘要翻译： 使用多帧去除不均匀运动模糊的方法和装置可以使用包括非均匀运动模糊的多帧估计不均匀运动模糊信息，并且可以使用所估计的运动模糊消除非均匀运动模糊 非均匀运动模糊和多帧。 该装置还可以通过迭代地执行非均匀运动模糊信息的估计和去除非均匀运动模糊来获得更精确的不均匀运动模糊信息。