公开(公告)号：US06716704B2

公开(公告)日：2004-04-06

申请号：US10085369

申请日：2002-02-28

Applicant: Hee-Jueng Lee ,  Ki-Chang Yoon

Inventor： Hee-Jueng Lee ,  Ki-Chang Yoon

IPC: H01L21336

CPC classification number: H01L27/11253 ,  H01L21/28273 ,  H01L29/66825

Abstract: A ROM device is fabricated by forming a first conductive layer pattern including a sidewall, on an insulating layer on an integrated circuit substrate. Ions are implanted into the integrated circuit substrate using the first conductive layer pattern as an implantation mask. At least a portion of the integrated circuit substrate, and at least a portion of the sidewall are thermally oxidized, to form a thermal oxide layer on at least a portion of the integrated circuit substrate and on the sidewall, and to form a buried doping layer from the implanted ions beneath the thermal oxide layer. A second conductive layer pattern is then formed on at least a portion of the thermal oxide layer and on at least a portion of the first conductive layer pattern.

Abstract translation: 通过在集成电路基板上的绝缘层上形成包括侧壁的第一导电层图案来制造ROM器件。 使用第一导电层图案作为注入掩模将离子注入集成电路基板。 集成电路基板的至少一部分以及侧壁的至少一部分被热氧化，以在集成电路基板的至少一部分和侧壁上形成热氧化物层，并形成掩埋掺杂层 来自热氧化物层下方的注入离子。 然后在热氧化物层的至少一部分上和第一导电层图案的至少一部分上形成第二导电层图案。