公开(公告)号：US20240421108A1

公开(公告)日：2024-12-19

申请号：US18818540

申请日：2024-08-28

Applicant: HUAWEI TECHNOLOGIES CO., LTD.

Inventor： Shuiming Li ,  Haijun Li ,  Zhili Zhang ,  Tao Liu ,  Jin Rao

IPC: H01L23/66 ,  H03F3/195 ,  H03F3/24

Abstract: A method includes: forming, on a substrate (10), an epitaxial layer (11) and a source conducting layer (21), where the epitaxial layer includes a first via, to form a first epitaxial layer (101) of the first transistor and a second epitaxial layer (102) of the second transistor; the source conducting layer includes a first source (211) of the first transistor and a second source (212) of the second transistor; and an edge of the first source (211) is flush with an edge of the first epitaxial layer (101) close to a side of the first via, and an edge of the second source (212) is flush with an edge of the second epitaxial layer (102) close to a side of the first via; forming a first conducting layer (13) in the first via; forming a second via; and forming a second conducting layer (14) in the second via.