公开(公告)号：US12147813B2

公开(公告)日：2024-11-19

申请号：US18064543

申请日：2022-12-12

Applicant: HUAWEI TECHNOLOGIES CO., LTD.

Inventor： Yifei Jiang ,  Siqi Zhao ,  Bo Wan

IPC: G06F9/30 ,  G06F9/38 ,  G06F9/455 ,  G06F9/48

Abstract: A method for handling an exception or interrupt in a heterogeneous instruction set architecture is provided. A physical host to which the method is applied can support two instruction set architectures. When a secondary architecture virtual machine triggers an exception or interrupt, a virtual machine monitor may translate code of the exception or interrupt in a secondary instruction set architecture into code of the exception or interrupt in a primary instruction set architecture. The virtual machine monitor) may identify the code of the exception or interrupt in the primary instruction set architecture. The virtual machine monitor identifies, based on the translated code, a type of the exception or interrupt triggered by the secondary architecture virtual machine, to handle the exception or interrupt.