公开(公告)号：US10318194B2

公开(公告)日：2019-06-11

申请号：US15504337

申请日：2014-10-02

Applicant: HITACHI DATA SYSTEMS ENGINEERING UK LIMITED

Inventor： Andrew Stephen Chittenden ,  Jonathan Mark Smith ,  Antonio Robert Carlini ,  Ashwin Payyanadan ,  Robert Ian Williams

IPC: G06F3/06 ,  G06F12/14 ,  G06F16/00 ,  G06F21/62 ,  G06F16/182

Abstract: The apparatus comprises a plurality of interfaces, each interface having an associated interface ID; and a hardware-side processing device including at least one programmable hardware-implemented chip configured to process request packets, which are received from host computers and relate to access requests to one or more file system managed by the apparatus, and to generate response packets for the processed request packets; wherein, for a request packet which is received from a first host computer, at least one programmable hardware-implemented chip is configured to: determine the client ID being associated with the first host computer, determine the interface ID being associated with the first interface, determine whether the determined client ID and interface ID represent a permitted ID set or a prohibited ID set, and refrain from processing the received request packet if the determined client ID and interface ID represent a prohibited ID set.