公开(公告)号：US09572199B2

公开(公告)日：2017-02-14

申请号：US14241233

申请日：2011-10-19

申请人： Guy Drory ,  Eliya Babitsky ,  Ron Bercovich

发明人： Guy Drory ,  Eliya Babitsky ,  Ron Bercovich

IPC分类号： H03D5/00 ,  H04W92/02 ,  H04B1/06 ,  H04B1/7115 ,  H04B1/00 ,  H04B1/16

CPC分类号： H04W92/02 ,  H04B1/005 ,  H04B1/06 ,  H04B1/16 ,  H04B1/7115 ,  H04B2201/70714

摘要： A multimode rake receiver comprise a common antenna interface, arranged to at least receive in a first mode a first CDMA radio channel carrying information encoded according to a first baseband modulation standard and to receive in a second mode a second CDMA radio channel carrying information encoded according to a second baseband modulation standard; and a common signal processing path, at least arranged to process in the first mode the first CDMA radio channel and in the second mode the second CDMA radio channel, wherein the common signal path comprises a common descrambling and de-spreading unit and a common hybrid code generating unit arranged to provide to the common descrambling and de-spreading unit chip codes applicable in the first mode to the first CDMA radio channel and in the second mode to the second CDMA radio channel.

摘要翻译： 多模Rake接收机包括公共天线接口，其被布置为至少以第一模式接收携带根据第一基带调制标准编码的信息的第一CDMA无线电信道，并且以第二模式接收携带根据 到第二基带调制标准; 以及公共信号处理路径，至少被布置为在第一模式中处理第一CDMA无线电信道，并且在第二模式中处理第二CDMA无线电信道，其中公共信号路径包括公共解扰和解扩单元和公共混合 代码生成单元，被配置为向第一CDMA无线电信道和第二模式提供适用于第一模式的公共解扰和解扩单元码片码到第二CDMA无线电信道。

公开(公告)号：US08638244B2

公开(公告)日：2014-01-28

申请号：US13389205

申请日：2009-08-31

申请人： Yuval Neeman ,  Eliya Babitsky ,  Yosef Kazaz

发明人： Yuval Neeman ,  Eliya Babitsky ,  Yosef Kazaz

IPC分类号： H03M7/00

CPC分类号： H03M13/271 ,  H03M13/2957 ,  H03M13/635 ,  H03M13/6544

摘要： An encoding module comprises an inverse interleaving module arranged to: determine an initial location index within an interleaving matrix for a data bit; and perform bit reverse ordering (BRO) on a column index value for the initial location index for the data bit to obtain a BRO column index value for the data bit. The inverse interleaving module is further arranged to calculate a number of valid interleaving matrix addresses preceding a location index for the data bit following bit reverse ordering; and determine a position of the data bit within the interleaved data stream based on the calculated number of valid addresses.

摘要翻译： 编码模块包括逆交错模块，其被布置为：确定用于数据比特的交织矩阵内的初始位置索引; 并对数据位的初始位置索引的列索引值执行位反向排序（BRO），以获得数据位的BRO列索引值。 逆交错模块还被布置为计算在位反向排序之后的数据位的位置索引之前的有效交织矩阵地址的数量; 并且基于计算出的有效地址的数量来确定交错数据流内的数据位的位置。

公开(公告)号：US08924829B2

公开(公告)日：2014-12-30

申请号：US13391296

申请日：2009-08-31

申请人： Yuval Neeman ,  Eliya Babitsky ,  Noam Zach

发明人： Yuval Neeman ,  Eliya Babitsky ,  Noam Zach

IPC分类号： H03M13/03 ,  H03M13/29 ,  H03M13/00

CPC分类号： H03M13/2996 ,  H03M13/2903 ,  H03M13/6544

摘要： A method for turbo-encoding a block of data including: receiving data bits of the block of data; masking irrelevant data bits by a masking unit, wherein irrelevant data bits are data bits that regardless of their value do not affect a final state of an interleaved convolutional encoder of a turbo encoder; calculating a last state of the interleaved convolutional encoder based on relevant data bits provided by the masking unit; wherein the calculating of the last state of the interleaved convolutional encoder is initialized before receiving the entire block of data; finding an initial state of the interleaved convolutional encoder based on the last state of the interleaved convolutional encoder; wherein the initial state of the interleaved convolutional encoder equals a final state of the interleaved convolutional encoder; initializing the interleaved convolutional encoder to the initial state; and turbo-encoding the interleaved data bits by the interleaved convolutional encoder.

摘要翻译： 一种用于对数据块进行turbo编码的方法，包括：接收数据块的数据位; 通过掩蔽单元掩蔽不相关的数据比特，其中不相关的数据比特是数据比特，不管它们的值不影响turbo编码器的交错卷积编码器的最终状态; 基于由所述掩蔽单元提供的相关数据比特来计算交错卷积编码器的最后状态; 其中在接收整个数据块之前初始化交织卷积编码器的最后状态的计算; 基于交错卷积编码器的最后状态，找到交错卷积编码器的初始状态; 其中交错卷积编码器的初始状态等于交错卷积编码器的最终状态; 将交错卷积编码器初始化为初始状态; 并且通过交错卷积编码器对交织的数据比特进行turbo编码。

公开(公告)号：US09652572B2

公开(公告)日：2017-05-16

申请号：US14758971

申请日：2013-01-08

申请人： FREESCALE SEMICONDUCTOR, INC. ,  Michael Priel ,  Eliya Babitsky ,  Asher Berkovitz ,  Vladimir Nusimovich

发明人： Michael Priel ,  Eliya Babitsky ,  Asher Berkovitz ,  Vladimir Nusimovich

IPC分类号： G06F17/50

CPC分类号： G06F17/505 ,  G06F17/5045

摘要： A method of performing logic synthesis of at least a part of an integrated circuit design. The method comprises identifying a first and at least one further module within the IC design that are mutually exclusive, selecting at least one register element within the first identified module and at least one register element within the at least one further identified module to be shared, and merging the first and at least one further mutually exclusive modules such that at least one common register element is shared between the first and at least one further mutually exclusive modules for the register elements selected to be shared.

公开(公告)号：US20120151295A1

公开(公告)日：2012-06-14

申请号：US13391296

申请日：2009-08-31

申请人： Yuval Neeman ,  Eliya Babitsky ,  Noam Zach

发明人： Yuval Neeman ,  Eliya Babitsky ,  Noam Zach

IPC分类号： H03M13/29 ,  G06F11/10

CPC分类号： H03M13/2996 ,  H03M13/2903 ,  H03M13/6544

摘要： A method for turbo-encoding a block of data including: receiving data bits of the block of data; masking irrelevant data bits by a masking unit, wherein irrelevant data bits are data bits that regardless of their value do not affect a final state of an interleaved convolutional encoder of a turbo encoder; calculating a last state of the interleaved convolutional encoder based on relevant data bits provided by the masking unit; wherein the calculating of the last state of the interleaved convolutional encoder is initialized before receiving the entire block of data; finding an initial state of the interleaved convolutional encoder based on the last state of the interleaved convolutional encoder; wherein the initial state of the interleaved convolutional encoder equals a final state of the interleaved convolutional encoder; initializing the interleaved convolutional encoder to the initial state; and turbo-encoding the interleaved data bits by the interleaved convolutional encoder.

摘要翻译： 一种用于对数据块进行turbo编码的方法，包括：接收数据块的数据位; 通过掩蔽单元掩蔽不相关的数据比特，其中不相关的数据比特是数据比特，不管它们的值不影响turbo编码器的交错卷积编码器的最终状态; 基于由所述掩蔽单元提供的相关数据比特来计算交错卷积编码器的最后状态; 其中在接收整个数据块之前初始化交织卷积编码器的最后状态的计算; 基于交错卷积编码器的最后状态，找到交错卷积编码器的初始状态; 其中交错卷积编码器的初始状态等于交错卷积编码器的最终状态; 将交错卷积编码器初始化为初始状态; 并且通过交错卷积编码器对交织的数据比特进行turbo编码。

公开(公告)号：US20120147988A1

公开(公告)日：2012-06-14

申请号：US13389205

申请日：2009-08-31

申请人： Yuval Neeman ,  Eliya Babitsky ,  Yosef Kazaz

发明人： Yuval Neeman ,  Eliya Babitsky ,  Yosef Kazaz

IPC分类号： H04L27/00

CPC分类号： H03M13/271 ,  H03M13/2957 ,  H03M13/635 ,  H03M13/6544

摘要： An encoding module comprises an inverse interleaving module arranged to: determine an initial location index within an interleaving matrix for a data bit; and perform bit reverse ordering (BRO) on a column index value for the initial location index for the data bit to obtain a BRO column index value for the data bit. The inverse interleaving module is further arranged to calculate a number of valid interleaving matrix addresses preceding a location index for the data bit following bit reverse ordering; and determine a position of the data bit within the interleaved data stream based on the calculated number of valid addresses.

摘要翻译： 编码模块包括逆交错模块，其被布置为：确定用于数据比特的交织矩阵内的初始位置索引; 并对数据位的初始位置索引的列索引值执行位反向排序（BRO），以获得数据位的BRO列索引值。 逆交错模块还被布置为计算在位反向排序之后的数据位的位置索引之前的有效交织矩阵地址的数量; 并且基于计算出的有效地址的数量来确定交错数据流内的数据位的位置。