公开(公告)号：US08765542B1

公开(公告)日：2014-07-01

申请号：US13765797

申请日：2013-02-13

申请人： GLOBALFOUNDARIES Inc.

发明人： Joachim Patzer ,  Frank Seliger ,  Markus Lenski ,  Stephan Kronholz

IPC分类号： H01L21/8238

CPC分类号： H01L21/823864 ,  H01L21/823828

摘要： One method disclosed includes forming a gate structure of a transistor above a surface of a semiconducting substrate, forming a sidewall spacer proximate the gate structure, forming a sacrificial layer of material above the protective cap layer, sidewall spacer and substrate, forming an OPL layer above the sacrificial layer, reducing a thickness of the OPL layer such that, after the reduction, an upper surface of the OPL layer is positioned at a level that is below a level of an upper surface of the protective cap layer, performing a first etching process to remove the sacrificial layer from above the protective cap layer to expose the protective cap layer for further processing, performing a second etching process to remove the protective cap layer and performing at least one process operation to remove at least one of the OPL layer or the sacrificial layer from above the surface of the substrate.

摘要翻译： 公开的一种方法包括在半导体衬底的表面上形成晶体管的栅极结构，在栅极结构附近形成侧壁隔离物，在保护盖层，侧壁间隔物和衬底上形成牺牲层，形成上面的OPL层 所述牺牲层减小所述OPL层的厚度，使得在所述还原之后，所述OPL层的上表面位于所述保护盖层的上表面的水平以下的水平，进行第一蚀刻工艺 以从保护盖层上方去除牺牲层以暴露保护盖层以进行进一步处理，执行第二蚀刻工艺以移除保护盖层并执行至少一个处理操作以去除OPL层或 牺牲层从衬底的表面上方。