公开(公告)号：US20180048779A1

公开(公告)日：2018-02-15

申请号：US15441761

申请日：2017-02-24

Applicant: FUJI XEROX CO., LTD.

Inventor： Kazuo HAYASHI ,  Kenichi TAKAHASHI ,  Shunji TSUNASHIMA

IPC: H04N1/00

CPC classification number: H04N1/00915 ,  H04N1/00952 ,  H04N2201/0094

Abstract: An image processing apparatus includes multiple image processing units and multiple execution controllers. The multiple image processing units respectively perform different types of image processing operations executable on image data. The multiple execution controllers each perform control to select and run grouped image processing units of the multiple image processing units. Each of the multiple execution controllers selects and runs the grouped image processing units in accordance with a corresponding one of rules that are specified for the respective execution controllers, and one of the multiple execution controllers is used in a series of image processing operations performed on the image data.

公开(公告)号：US20210185179A1

公开(公告)日：2021-06-17

申请号：US16847757

申请日：2020-04-14

Applicant: FUJI XEROX CO., LTD.

Inventor： Terutake HAYASHI ,  Shunji TSUNASHIMA ,  Nobukazu MIYOSHI

IPC: H04N1/00 ,  G06F9/48

Abstract: An information processing apparatus includes a processor configured to acquire an additional processing program for performing additional processing in response to a connection of an additional processing apparatus configured to perform the additional processing for a function of the information processing apparatus, and store the acquired additional processing program in the information processing apparatus.

公开(公告)号：US20190245998A1

公开(公告)日：2019-08-08

申请号：US16211245

申请日：2018-12-06

Applicant: FUJI XEROX CO., LTD.

Inventor： Shunji TSUNASHIMA ,  Nobukazu MIYOSHI

IPC: H04N1/00 ,  G06F13/10

CPC classification number: H04N1/00965 ,  G06F13/102

Abstract: An information processing apparatus includes a detection unit that detects a connection of an arithmetic device, a specifying unit that specifies an arithmetic operation capable of being performed by the arithmetic device, a transfer unit that transfers data used in the arithmetic operation to the arithmetic device in a case where the specified arithmetic operation is determined to be performed by the information processing apparatus before the connection, and an acquisition unit that acquires a result obtained by the arithmetic device performing the arithmetic operation using the data.

公开(公告)号：US20210099607A1

公开(公告)日：2021-04-01

申请号：US16837397

申请日：2020-04-01

Applicant: FUJI XEROX CO., LTD.

Inventor： Nobukazu MIYOSHI ,  Shunji TSUNASHIMA ,  Terutake HAYASHI

IPC: H04N1/32 ,  H04N1/00

Abstract: An information processing apparatus includes a memory and a processor. The processor is configured to: when an extension device that extends functions of the information processing apparatus by being connected to the information processing apparatus is connected to the information processing apparatus, display (i) information representing a basic function provided in the information processing apparatus and (ii) information representing an extended function added by the extension device on one screen together; and when the connection with the extension device is released, display the information representing the extended function so as to indicate that the extended function becomes available when the extension device is connected to the information processing apparatus.

公开(公告)号：US20170257522A1

公开(公告)日：2017-09-07

申请号：US15243515

申请日：2016-08-22

Applicant: FUJI XEROX CO., LTD.

Inventor： Kenichi TAKAHASHI ,  Shunji TSUNASHIMA ,  Kazuo HAYASHI

IPC: H04N1/40 ,  H04N1/23

CPC classification number: H04N1/40068 ,  H04N1/2338 ,  H04N2201/0091

Abstract: An integrated circuit includes a first signal line, a first circuit, a second signal line, and an attaching circuit. A first signal is transferred via the first signal line. The first circuit is connected to the first signal line and performs image processing upon the first signal being transferred thereto. The second signal line is connected to the first signal line, and a second signal indicating that the first signal has been transferred is transferred via the second signal line. The attaching circuit is connected to the second signal line and attaches, upon the second signal being transferred thereto via the second signal line, information corresponding to the second signal to an image resulting from the image processing performed by the first circuit.

公开(公告)号：US20200099806A1

公开(公告)日：2020-03-26

申请号：US16564645

申请日：2019-09-09

Applicant: FUJI XEROX CO., LTD.

Inventor： Nobukazu MIYOSHI ,  Shunji TSUNASHIMA ,  Terutake HAYASHI

IPC: H04N1/00

Abstract: An information processing device includes an information processing device body, an extension device to be additionally connected to the information processing device body, and a combined information generator that generates combined information to be used for displaying, on one screen, information indicating a basic function of the information processing device body together with information indicating an extended function of the extension device when the extension device is connected to the information processing device body.

公开(公告)号：US20170277641A1

公开(公告)日：2017-09-28

申请号：US15246924

申请日：2016-08-25

Applicant: FUJI XEROX CO., LTD.

Inventor： Shunji TSUNASHIMA ,  Kenichi TAKAHASHI ,  Kazuo HAYASHI

IPC: G06F12/14 ,  G06F3/06

CPC classification number: G06F12/1416 ,  G06F12/1408 ,  G06F21/10 ,  G06F21/805 ,  G06F2212/1052

Abstract: An integrated circuit includes a processing circuit, a first memory, and a writing unit. The processing circuit includes a memory space and stores data in the memory space and performs processing. The first memory stores permission information indicating a range permitted to be used in the memory space. The writing unit writes, in response to a request to write data to a specified address in the memory space, the data to the specified address in a case where the permission information indicating a range including the specified address is stored.