公开(公告)号：US3898482A

公开(公告)日：1975-08-05

申请号：US45632674

申请日：1974-03-29

Applicant: FAIRCHILD CAMERA INSTR CO

Inventor： HOLT JR JAMES G

IPC: H04B1/10 ,  H01L27/07 ,  H01L27/082 ,  H03K5/08

CPC classification number: H01L27/0826 ,  H01L27/0755

Abstract: An improved noise suppression circuit which includes a first transistor having a collector, an emitter coupled to the input of the circuit, and a base coupled to an output of the circuit through an impedance means. The circuit includes a second transistor having a base coupled to the collector of the first transistor, a collector coupled to a reference potential, and an emitter integral with the impedance means. The circuit of the present invention can be constructed to suppress positive-going noise pulses, negative-going noise pulses, or one of each can be cascaded to suppress both positive and negative-going noise pulses.

Abstract translation: 一种改进的噪声抑制电路，其包括具有集电极的第一晶体管，耦合到所述电路的输入的发射极，以及通过阻抗装置耦合到所述电路的输出的基极。 电路包括第二晶体管，其具有耦合到第一晶体管的集电极的基极，耦合到参考电位的集电极和与阻抗装置集成的发射极。 本发明的电路可以被构造成抑制正向噪声脉冲，负向噪声脉冲，或者可以级联其中的一个以抑制正和负噪声脉冲。