EFFICIENT ENFORCEMENT OF COMMAND EXECUTION ORDER IN SOLID STATE DRIVES
    1.
    发明申请
    EFFICIENT ENFORCEMENT OF COMMAND EXECUTION ORDER IN SOLID STATE DRIVES 有权
    有效执行固态执法机构的命令执行令

    公开(公告)号:US20140059270A1

    公开(公告)日:2014-02-27

    申请号:US13593299

    申请日:2012-08-23

    IPC分类号: G06F12/00

    摘要: A method in a storage device includes receiving from a host storage commands for execution in a non-volatile memory of the storage device. At least a subset of the storage commands are to be executed in accordance with an order-of-arrival in which the storage commands in the subset are received. The received storage commands are executed in the non-volatile memory in accordance with internal scheduling criteria of the storage device, which permit deviations from the order-of-arrival, but such that execution of the storage commands in the subset reflects the order-of-arrival to the host.

    摘要翻译: 存储装置中的方法包括从主机存储命令以在存储装置的非易失性存储器中执行。 存储命令的至少一个子集将根据接收到的子集中的存储命令的到达顺序被执行。 接收到的存储命令根据存储设备的内部调度标准在非易失性存储器中执行,这允许偏离到达顺序,但是使得子集中的存储命令的执行反映了 适合主机。

    Efficient enforcement of command execution order in solid state drives
    2.
    发明授权
    Efficient enforcement of command execution order in solid state drives 有权
    在固态驱动器中有效执行命令执行顺序

    公开(公告)号:US09122401B2

    公开(公告)日:2015-09-01

    申请号:US13593299

    申请日:2012-08-23

    IPC分类号: G06F12/00 G06F3/06

    摘要: A method in a storage device includes receiving from a host storage commands for execution in a non-volatile memory of the storage device. At least a subset of the storage commands are to be executed in accordance with an order-of-arrival in which the storage commands in the subset are received. The received storage commands are executed in the non-volatile memory in accordance with internal scheduling criteria of the storage device, which permit deviations from the order-of-arrival, but such that execution of the storage commands in the subset reflects the order-of-arrival to the host.

    摘要翻译: 存储设备中的方法包括从主机接收存储命令以在存储设备的非易失性存储器中执行的命令。 存储命令的至少一个子集将根据接收到的子集中的存储命令的到达顺序被执行。 接收到的存储命令根据存储设备的内部调度标准在非易失性存储器中执行,这允许偏离到达顺序,但是使得子集中的存储命令的执行反映了 适合主机。

    Method and device for combating PCM line impairments
    3.
    发明授权
    Method and device for combating PCM line impairments 有权
    防止PCM线路损伤的方法和装置

    公开(公告)号:US06553074B1

    公开(公告)日:2003-04-22

    申请号:US09271818

    申请日:1999-03-18

    IPC分类号: H04B1404

    CPC分类号: H04L25/4927

    摘要: A method and device for combating logarithmic quantization and Robbed Bit Signaling (RBS) impairments that..are typical to PCM telephone lines is descried. An apparatus is described which includes a front-end unit which receives samples of the digital PCM line, an impairment identifier unit which identifies samples that have a high likelihood to have, large impairments due to the PCM line, an impairment estimator unit which estimates the value of impairment caused by the digital line, a samples reconstructor unit which fixes received samples by subtracting from them the value of the estimated impairment and an output unit transfers the reconstructed samples to a receiver. The method allows improving signal quality at the output of the PCM line, and thus improving data rates and robustness of digital communication receivers, and particularly of V.34 receivers, or V.90 transceivers that are digitally linked to the PCM, line.

    摘要翻译: 描述了一种用于对抗PCM电话线路的典型对数量化和Robbed Bit Signaling(RBS)损伤的方法和装置。 描述了一种装置,其包括接收数字PCM线路的采样的前端单元,识别具有高似然性的样本的损害标识符单元,所述损伤识别单元具有由于PCM线路造成的大的损伤,所述损伤估计器单元估计 由数字线引起的损害的值,样本重建单元,其通过从其中减去估计的损害的值来固定接收的样本,并且输出单元将重建的样本传送到接收器。 该方法允许改善PCM线输出端的信号质量,从而提高数字通信接收机,特别是数字连接到PCM线路的V.34接收机或V.90收发器的数据速率和鲁棒性。

    Dynamic asymmetric partitioning of program code memory in network connected devices
    4.
    发明申请
    Dynamic asymmetric partitioning of program code memory in network connected devices 审中-公开
    网络连接设备中程序代码存储器的动态非对称分区

    公开(公告)号:US20080263348A1

    公开(公告)日:2008-10-23

    申请号:US12100383

    申请日:2008-04-09

    IPC分类号: G06F12/02 G06F9/00 H04N7/173

    CPC分类号: G06F8/63

    摘要: A novel asymmetric memory partitioning mechanism for providing resolving and reducing memory limitations when an increase in software image size is required. Two partitions are created in non-volatile memory, one smaller than the other. The smaller partition stores a degenerated version of the full-functionality software comprising only essential program code for booting the device and repeating the download and installation procedures until the full-functionality software image is successfully installed in non-volatile memory. The larger portion stores a full-functionality version of the software comprising both essential and non-essential program code. The mechanism also provides the capability of converting devices already deployed in the field. The legacy symmetrical partitioning of the memory in these devices is removed and replaced with asymmetrical partitioning, wherein the smaller partition stores the degenerated software image and the larger partition stores the full-functionality software image.

    摘要翻译: 一种新颖的非对称存储器分配机制,用于在需要增加软件映像大小时提供解决和减少内存限制。 在非易失性存储器中创建两个分区,一个小于另一个分区。 较小的分区存储全功能软件的退化版本,其仅包括用于引导设备的重要程序代码,并重复下载和安装程序,直到全功能软件映像成功安装在非易失性存储器中。 较大的部分存储包括基本和非必要程序代码的软件的全功能版本。 该机制还提供了已经部署在现场的设备的转换能力。 删除这些设备中存储器的传统对称分区,并用不对称分区替换,其中较小的分区存储退化的软件映像,较大的分区存储全功能软件映像。

    Cable modem downstream channel bonding re-sequencing mechanism
    5.
    发明授权
    Cable modem downstream channel bonding re-sequencing mechanism 有权
    电缆调制解调器下行通道绑定重排序机制

    公开(公告)号:US07573884B2

    公开(公告)日:2009-08-11

    申请号:US11681784

    申请日:2007-03-04

    IPC分类号: H04L12/54 H04L12/56

    摘要: A novel apparatus and method of packet re-sequencing applicable to systems wherein packets are assigned sequence numbers and transmitted over multiple channels with the requirement they be re-ordered at the receiving side. The mechanism is particularly suitable for use in cable systems adapted to implement the DOCSIS 3.0 specification which permits the bonding of a plurality of downstream channels into a single virtual high data rate pipe. In operation, received packets are stored in a memory whereby a pointer to the memory storage location is written into a context table diagram in accordance with the sequence number extracted from the packet. Packets are released in sequence order regardless of the order in which they were received.

    摘要翻译: 一种分组重新排序的新颖的装置和方法,适用于其中分组被分配序列号并且在多个信道上发送并且在接收侧被重新排序的要求的系统。 该机构特别适用于适用于实施DOCSIS 3.0规范的电缆系统,该规范允许将多个下游信道绑定到单个虚拟高数据速率管道中。 在操作中,接收的分组被存储在存储器中,由此根据从分组提取的序列号,将指向存储器存储位置的指针写入上下文表图。 数据包按照顺序排列,无论其接收顺序如何。

    HYBRID MPEG/IP DIGITAL CABLE GATEWAY DEVICE AND ARCHITECTURE ASSOCIATED THEREWITH
    7.
    发明申请
    HYBRID MPEG/IP DIGITAL CABLE GATEWAY DEVICE AND ARCHITECTURE ASSOCIATED THEREWITH 审中-公开
    混合MPEG / IP数字电缆网关设备及其相关的架构

    公开(公告)号:US20080120667A1

    公开(公告)日:2008-05-22

    申请号:US11927179

    申请日:2007-10-29

    申请人: Etai Zaltsman

    发明人: Etai Zaltsman

    IPC分类号: H04N7/173 H04L12/66 H04L12/56

    摘要: A novel cable gateway system and architecture incorporating a hybrid digital video transceiver. The digital cable system architecture combines reception of legacy video such as MPEG-TS based DVB-C streams with that of original IP video over DOCSIS channels. The system comprises a hybrid DVB/IP cable gateway STB capable of receiving both legacy DVB-C video and original IP video streams. The cable gateway device performs the front-end functionality (including QAM receiver, tuner and broadband connection) while the back-end functionality of video decoding and display is performed by one or more standard IP-STBs connected to the cable gateway device over a network (e.g., home LAN). Legacy MPEG-TS based DVB-C video is captured and encapsulated into packets for distribution over the network to the IP-STBs. The cable gateway distributes the original IP video received over the CATV source and the encapsulated legacy video as video over IP packets over the network.

    摘要翻译: 一种结合混合数字视频收发器的新型有线网关系统和架构。 数字有线系统架构将诸如基于MPEG-TS的DVB-C流之类的遗留视频与通过DOCSIS信道的原始IP视频的传统视频相结合。 该系统包括能够接收传统DVB-C视频和原始IP视频流的混合DVB / IP电缆网关STB。 电缆网关设备执行前端功能(包括QAM接收机,调谐器和宽带连接),而视频解码和显示的后端功能由一个或多个通过网络连接到有线网关设备的标准IP-STB执行 (例如家庭LAN)。 传统的基于MPEG-TS的DVB-C视频被捕获并封装成分组,以通过网络分发到IP-STB。 有线网关通过网络将通过CATV源接收的原始IP视频和封装的传统视频作为IP分组上的视频进行分发。

    Cable Modem Downstream Channel Bonding Re-sequencing Mechanism
    8.
    发明申请
    Cable Modem Downstream Channel Bonding Re-sequencing Mechanism 有权
    有线调制解调器下行信道绑定重排序机制

    公开(公告)号:US20070206600A1

    公开(公告)日:2007-09-06

    申请号:US11681784

    申请日:2007-03-04

    IPC分类号: H04L12/54 H04L12/56

    摘要: A novel apparatus and method of packet re-sequencing applicable to systems wherein packets are assigned sequence numbers and transmitted over multiple channels with the requirement they be re-ordered at the receiving side. The mechanism is particularly suitable for use in cable systems adapted to implement the DOCSIS 3.0 specification which permits the bonding of a plurality of downstream channels into a single virtual high data rate pipe. In operation, received packets are stored in a memory whereby a pointer to the memory storage location is written into a context table diagram in accordance with the sequence number extracted from the packet. Packets are released in sequence order regardless of the order in which they were received.

    摘要翻译: 一种分组重新排序的新颖的装置和方法,适用于其中分组被分配序列号并且在多个信道上发送并且在接收侧被重新排序的要求的系统。 该机构特别适用于适用于实施DOCSIS 3.0规范的电缆系统,该规范允许将多个下游信道绑定到单个虚拟高数据速率管道中。 在操作中,接收的分组被存储在存储器中,由此根据从分组提取的序列号,将指向存储器存储位置的指针写入上下文表图。 数据包按照顺序排列,无论其接收顺序如何。