Abstract:
A processor time synchronization apparatus and method in a data communication system which includes a plurality of processors and line interfaces. The processor time synchronization apparatus includes a first local processor configured to recognize a time difference between an external device and the system based on a time message exchanged with the external device, and synchronize time between the external device and the system, and a second local processor configured to receive time information from the first local processor that has been time-synchronized with the external device, the time information containing the time difference between the external device and the system, and synchronize the first local processor with a system's internal time using the received time information.
Abstract:
An apparatus and method for protection switching are disclosed. The protection switching method in accordance with an example of the present disclosure is capable of smoothly processing a protection switching while preventing a data path mismatch occurring in the protection switching in a case in which a forced switching command (FS), which is a passive command, and a signal failure (SF) of a protection path occur at both end nodes, respectively, when a linear protection switching is performed by use of a protection state coordination message in a packet network or a packet transport network.