公开(公告)号：US20250078880A1

公开(公告)日：2025-03-06

申请号：US18825257

申请日：2024-09-05

Applicant: Electronics and Telecommunications Research Institute

Inventor： Min Hyung CHO ,  Yi Gyeong KIM ,  Young Deuk JEON ,  Young Su KWONG ,  Su Jin PARK

IPC: G11C7/10 ,  H03K19/0185

Abstract: An apparatus for correcting output impedance of a memory interface driving circuit, the apparatus comprising: a first PD driver including a plurality of first sub PD drivers connected to each other in parallel; a first control unit configured to sequentially change a first control code, the first control code being a combination of control signals for turning the plurality of first sub PD drivers on or off in each pull-down sweep; and a first comparator configured to generate a first output pattern, the first output pattern being a sequence of 0 or 1 representing a result of comparing an output voltage of the first PD driver generated according to the first control code with a first reference voltage, wherein the first control unit determines a first impedance correction code for the memory interface driving circuit from among the sequentially changing first control codes using the first output pattern.