公开(公告)号：US20250169139A1

公开(公告)日：2025-05-22

申请号：US18945658

申请日：2024-11-13

Applicant: Electronics and Telecommunications Research Institute

Inventor： Sang Hoon KIM ,  Dongwoo SUH ,  Jeong Woo PARK ,  Minkyun SOHN ,  Seong Hyun LEE ,  Wangjoo LEE ,  Jinha KIM ,  Min-A PARK ,  Sun Kyu JUNG ,  Subin HEO

IPC: H01L29/66 ,  H01L21/8234 ,  H01L27/092 ,  H01L29/06 ,  H01L29/08 ,  H01L29/423 ,  H01L29/775 ,  H01L29/78 ,  H01L29/786

Abstract: Provided is a transistor device including: a substrate; a lower transistor positioned on the substrate and including a lower channel layer, a lower gate, and a lower source/drain region; an upper transistor positioned on the lower transistor and including an upper channel layer, an upper gate, and an upper source/drain region; and an inner spacer configured to insulate the lower transistor from the upper transistor, wherein the inner spacer may be formed by removing a portion of each of a first sacrificial layer and a second sacrificial layer, which are formed above and below the lower channel layer and the upper channel layer and have different Ge contents, to a depth according to a Ge content and then depositing an insulating material.