公开(公告)号：US20140365547A1

公开(公告)日：2014-12-11

申请号：US14138419

申请日：2013-12-23

Applicant: Electronics and Telecommunications Research Institute

Inventor： Jin-Kyu KIM ,  Bon-Tae KOO

IPC: G06F17/14

CPC classification number: G06F17/142

Abstract: Disclosed herein are a mixed-radix pipelined Fast Fourier Transform (FFT) processor and an FFT processing method using the same. The mixed-radix pipelined Fast Fourier Transform (FFT) processor includes a first radix chain, a second radix chain, an input buffer, and an output buffer. The first radix chain includes first radix processors that are connected in series to each other. The second radix chain includes second radix processors that are connected in series to each other, and is connected in series to the first radix chain. The input buffer performs index mapping on a sequence input to the first radix chain. The output buffer generates a final FFT output by performing index mapping on a sequence generated using outputs of one or more of the first and second radix chains.

Abstract translation: 本文公开了混合流水线快速傅里叶变换（FFT）处理器和使用其的FFT处理方法。 混合流水线快速傅里叶变换（FFT）处理器包括第一基数链，第二基数链，输入缓冲器和输出缓冲器。 第一个基数链包括彼此串联连接的第一个基数处理器。 第二基数链包括彼此串联连接的第二基数处理器，并且串联连接到第一基数链。 输入缓冲区对输入到第一个基数链的序列执行索引映射。 输出缓冲器通过对使用第一和第二基数中的一个或多个的输出产生的序列执行索引映射来产生最终的FFT输出。