METHOD AND APPARATUS FOR HARDWARE-BASED ACCELERATED ARITHMETIC OPERATION ON HOMOMORPHICALLY ENCRYPTED MESSAGE

    公开(公告)号:US20230163945A1

    公开(公告)日:2023-05-25

    申请号:US17954029

    申请日:2022-09-27

    CPC classification number: H04L9/008 H04L9/0618 G06F7/4876

    Abstract: Provided are a method and apparatus for a hardware-based accelerated arithmetic operation on homomorphically encrypted messages. The method of performing hardware-based modular multiplication on homomorphically encrypted messages according to the present invention includes receiving a plurality of homomorphically encrypted messages expressed in a polynomial form and a modulus for modular multiplication, decomposing the modulus into a product of a plurality of disjoint factors through CRT operation, and extracting a divided ciphertext from a plurality of homomorphically encrypted messages based on each of the disjoint factors, performing NTT transformation on each coefficient of the divided ciphertext, performing a pointwise multiplication operation between result values of the NTT transformation, performing INTT transformation on a result value of the pointwise multiplication operation to obtain the divided ciphertext, and merging the divided ciphertext obtained in the performing of the INTT transformation through ICRT operation to generate an output ciphertext.

    COLD WALLET APPARATUS AND METHOD OF CONTROLLING THE SAME

    公开(公告)号:US20240152904A1

    公开(公告)日:2024-05-09

    申请号:US18504739

    申请日:2023-11-08

    Abstract: The present invention relates to a cold wallet apparatus. The cold wallet apparatus includes a homomorphic encryption generation module configured to generate homomorphic encryption using personally identifiable sensitive information; a first authentication code extraction module configured to extract an authentication code from the homomorphic encryption; a second authentication code extraction module configured to extract an authentication code from physical unclonable function (PUF) information of the cold wallet apparatus; a private key generation module configured to combine the authentication code extracted from the homomorphic encryption and the authentication code extracted from the PUF information to generate a private key; and a transaction signature module configured to perform a transaction signature using a wallet account and a wallet address generated based on the private key.

    PROGRAM CONVERSION APPARATUS AND METHOD
    4.
    发明公开

    公开(公告)号:US20240160423A1

    公开(公告)日:2024-05-16

    申请号:US18505799

    申请日:2023-11-09

    CPC classification number: G06F8/54

    Abstract: Disclosed herein is a program conversion apparatus, which converts a first program to which homomorphic encryption is not applied into a second program to which the homomorphic encryption is applied, including a memory, which stores a first library for configuring the first program and a second library for configuring the second program, and a processor configured to convert the first program into the second program through conversion between operations provided by the first and second libraries.

    SELF-DESTRUCTIBLE APPARATUS AND METHOD AND SEMICONDUCTOR CHIP USING THE SAME

    公开(公告)号:US20200350264A1

    公开(公告)日:2020-11-05

    申请号:US16765122

    申请日:2018-11-23

    Inventor: Seong Cheon PARK

    Abstract: The present invention relates to a self-destructible apparatus and method. The apparatus includes a self-destructible operation unit composed of a plurality of cavity cells; a variable voltage/current supply unit configured to supply a variable voltage and current to the self-destructible operation unit; an identification (ID) matching unit configured to compare an ID input from an external source to a digital physical unclonable function (PUF) ID assigned to each of the cavity cells to determine whether the two IDs match each other so that power of the variable voltage/current supply unit is supplied to only a desired cavity cell among the plurality of cavity cells; a digital PUF ID generation unit configured to generate the digital PUF ID input to the ID matching unit; and an external ID input unit configured to generate the ID input to the ID matching unit.

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