RADAR DEVICE OPERATING IN DUAL MODE AND OPERATION METHOD THEREOF

    公开(公告)号:US20220244371A1

    公开(公告)日:2022-08-04

    申请号:US17573177

    申请日:2022-01-11

    Abstract: Disclosed is a radar device capable of operating in a dual mode, which includes a transmitter that includes a first signal generator that generates a Doppler radar signal and a second signal generator that generates a Frequency Modulated Continuous Wave (FMCW) radar signal, a receiver that receives a reflected signal reflected from a target and converts the reflected signal to a digital signal, a signal processing circuit that processes the digital signal differently depending on the dual mode to output an output signal, a signal analysis circuit that analyzes the output signal, and a controller that controls operations of the transmitter, the receiver, the signal processing circuit, and the signal analysis circuit, and the dual mode includes a first mode in which the first signal generator is activated and a second mode in which the second signal generator is activated.

    PHASE DEMODULATOR WITH NEGATIVE FEEDBACK LOOP

    公开(公告)号:US20220302909A1

    公开(公告)日:2022-09-22

    申请号:US17585009

    申请日:2022-01-26

    Abstract: Disclosed is a phase demodulator, which includes a transmitter that outputs a reference signal to a target, a receiver that receives a target signal generated in response to the reference signal from the target, and a demodulation processor that demodulates the target signal, and the demodulation processor includes a phase controller that outputs a first phase signal based on the reference signal, a phase shifter that delays a phase of the first phase signal to output a first delayed signal, a mixer that outputs a first mixing signal based on the target signal and the first delay signal, and an amplifier that outputs a first feedback signal generated by amplifying the first mixing signal to the phase controller.

    DRIVE AMPLIFIER
    4.
    发明申请

    公开(公告)号:US20210359654A1

    公开(公告)日:2021-11-18

    申请号:US17317483

    申请日:2021-05-11

    Abstract: Provided is a drive amplifier. A drive amplifier may include: a main circuit configured to receive an RF input signal and output a first RF output signal; and a selective bias adjustment circuit comprising a first common gate transistor to which a first common gate bias voltage is applied and a second common gate transistor to which a second common gate bias voltage is applied, and configured to output a second RF output signal using the first common gate transistor and the second common gate transistor.

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