Abstract:
Provided is a low density parity check (LDPC) encoding apparatus and method that may store M registers each including N bits, obtain N×M parity bits by performing a partial parallel operation an N×M number of times with respect to the M registers, and mutually invert subsequent N parity bits periodically, based on previous parity bits for each Nth parity bit of the N×M parity bits, respectively.
Abstract:
Disclosed are a signal receiving apparatus based on FTN and a signal decoding method thereof, and the apparatus includes: an equalizer calculating, when a signal sampled by Fast to Nyquist (FTN) is received on a communication channel, a posterior probability of information bits and calculating a log likelihood ratio by using the calculated posterior probability; a deinterleaver deinterleaving bit data output from the equalizer; a decoder correcting of signal interference of the data bits deinterleaved by the deinterleaver by using the LLR and decoding the corrected signal interference; and an interleaver interleaving data output from the decoder to provide the interleaved data to the equalizer.