Reproducible, high yield method for fabricating ultra-short T-gates on HFETs
    1.
    发明授权
    Reproducible, high yield method for fabricating ultra-short T-gates on HFETs 有权
    用于在HFET上制造超短T型栅极的可再现的高产率方法

    公开(公告)号:US07943286B2

    公开(公告)日:2011-05-17

    申请号:US12079529

    申请日:2008-03-27

    IPC分类号: G03F7/26

    CPC分类号: H01L21/28581 H01L21/0272

    摘要: A method for fabricating ultra-short T-gates on heterojunction field effect transistors (HFETs) comprising the steps of (a) providing a coating of three layers of resists, with polymethylmethacrylate (PMMA) with high molecular weight on the bottom, polydimethylglutarimide (PMGI) in the middle, and PMMA with low molecular weight on the top; (b) in a first exposure, exposing and developing the layers with a dose of a developer that is high enough to allow the developer to break the top PMMA but low to avoid contributing significantly to the overall dose received in the bottom PMMA layer; and (c) in a second exposure, using an exposure and developing process to define 0.03-0.05 um openings in the bottom PMMA layer.

    摘要翻译: 一种用于在异质结场效应晶体管(HFET)上制造超短T栅极的方法,包括以下步骤:(a)提供三层抗蚀剂的涂层与底部具有高分子量的聚甲基丙烯酸甲酯(PMMA),聚二甲基戊二酰亚胺(PMGI ),顶部分子量低的PMMA; (b)在第一次曝光中,用一定剂量的显影剂曝光和显影层,以使得显影剂能够破坏顶部PMMA但是低,以避免对底部PMMA层中所接收的总剂量产生显着影响; 和(c)在第二次曝光中,使用曝光和显影过程在底部PMMA层中限定0.03-0.05μm的开口。

    Reproducible, high yield method for fabricating ultra-short T-gates on HFETs
    2.
    发明申请
    Reproducible, high yield method for fabricating ultra-short T-gates on HFETs 有权
    用于在HFET上制造超短T型栅极的可再现的高产率方法

    公开(公告)号:US20080241757A1

    公开(公告)日:2008-10-02

    申请号:US12079529

    申请日:2008-03-27

    IPC分类号: G03F7/20

    CPC分类号: H01L21/28581 H01L21/0272

    摘要: A method for fabricating ultra-short T-gates on heterojunction field effect transistors (HFETs) comprising the steps of (a) providing a coating of three layers of resists, with polymethylmethacrylate (PMMA) with high molecular weight on the bottom, polydimethylglutarimide (PMGI) in the middle, and PMMA with low molecular weight on the top; (b) in a first exposure, exposing and developing the layers with a dose of a developer that is high enough to allow the developer to break the top PMMA but low to avoid contributing significantly to the overall dose received in the bottom PMMA layer; and (c) in a second exposure, using an exposure and developing process to define 0.03-0.05 um openings in the bottom PMMA layer.

    摘要翻译: 一种用于在异质结场效应晶体管(HFET)上制造超短T栅极的方法,包括以下步骤:(a)提供三层抗蚀剂的涂层与底部具有高分子量的聚甲基丙烯酸甲酯(PMMA),聚二甲基戊二酰亚胺(PMGI ),顶部分子量低的PMMA; (b)在第一次曝光中,用一定剂量的显影剂曝光和显影层,以使得显影剂能够破坏顶部PMMA但是低,以避免对底部PMMA层中所接收的总剂量产生显着影响; 和(c)在第二次曝光中,使用曝光和显影过程在底部PMMA层中限定0.03-0.05μm的开口。

    Field effect transistors with gate electrodes having Ni and Ti metal layers
    3.
    发明授权
    Field effect transistors with gate electrodes having Ni and Ti metal layers 有权
    具有栅电极的场效应晶体管具有Ni和Ti金属层

    公开(公告)号:US09136111B1

    公开(公告)日:2015-09-15

    申请号:US13537538

    申请日:2012-06-29

    IPC分类号: H01L29/15 H01L21/02

    摘要: A field effect transistor and method for making such a transistor is provided, the field effect transistor comprising: a gate layer stack comprising a layer of a first metal is disposed proximate to at least one layer of a second metal, wherein the first metal alloys with the second metal to form a shape memory alloy. The shape metal allow may be NiTi, and at the contact plane between the layers, the alloy is formed when the transistor is heated to an elevated temperature.

    摘要翻译: 提供了一种用于制造这种晶体管的场效应晶体管和方法,所述场效应晶体管包括:包括第一金属层的栅层叠层设置在至少一层第二金属附近,其中所述第一金属合金与 第二金属形成形状记忆合金。 形状金属允许可以是NiTi,并且在层之间的接触平面处,当晶体管被加热到升高的温度时,形成合金。